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Design >> RF Design >> Question about the capacitance in MOSFET.
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Message started by weigiho on Jul 12^th, 2010, 3:14pm

Title: Question about the capacitance in MOSFET.
Post by weigiho on Jul 12^th, 2010, 3:14pm

I simulate a common-source amplifier with a capacitor load CL. Its drain is connected to VDD through an ideal current source. The input freq is high so that I cannot neglect the effect of parasitic capacitance. I am interested in finding the drain voltage. By using DC analysis, I can find all the parameters, such as gm, gds, Cdd, Cdg, Cdb and Cds. I use

vd=vin*gm/(gds+jωCL+jωCdd)

to find vd. My calculated value is 2.3951e-5. But the transient simulation+FFT gives me 1.32131e-5. Why there is a big difference? The possible reason I guess is

(1)Should I use Cdd here? If yes, do I have to consider Miller effect?
(2)There are other parameters, such as Cddbi and Cgdovl. I do not know what they mean so I did not include them at all. Is this the reason for the big difference?

Thanks a lot in advance.

Title: Re: Question about the capacitance in MOSFET.
Post by aaron_do on Jul 13^th, 2010, 1:48am

Hi,

You seem to have left out the path through Cgd. Maybe that's the reason?

cheers,
Aaron

Title: Re: Question about the capacitance in MOSFET.
Post by love_analog on Jul 29^th, 2010, 6:27am

Aaron_do
I believe Cdd includes Cdg. Thats not the same as Cgd, I agree but we only need Cdg.

In any case, I have not had great success correlating operating parametes and doing hand analysis on them with the simulated values. The hand analysis is more like a ball-parkish figure.