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https://designers-guide.org/forum/YaBB.pl Simulators >> RF Simulators >> How could I verify the PLL loop bandwidth https://designers-guide.org/forum/YaBB.pl?num=1280309558 Message started by casual on Jul 28th, 2010, 2:32am |
Title: How could I verify the PLL loop bandwidth Post by casual on Jul 28th, 2010, 2:32am I have modeled the PLL system in matlab (Laplace) and set the bandwidth accordingly. How could I verify the PLL loop bandwidth I set in the schematic simulation? Can I obtain the PLL transfer function? loop BW=K_total*R for over-damped system note: the PLL is for CDR, thus it does not have frequency acquisition. |
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