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https://designers-guide.org/forum/YaBB.pl Design Languages >> Verilog-AMS >> Command Execution Sequence in VerilogA https://designers-guide.org/forum/YaBB.pl?num=1280793898 Message started by neoflash on Aug 2nd, 2010, 5:04pm |
Title: Command Execution Sequence in VerilogA Post by neoflash on Aug 2nd, 2010, 5:04pm I observed one interesting phenomenon: When variables used in one cross() function are assigned value outside of this cross() function, the sequence of execution is not predictable. Below is the code I used for simulation, up0 is expected to be updated before used for calculation of up_int, however, it is not. Up_int still calculates based on old up0 value, although up0 seems to be updated immediately with new e0 value. As a comparison, e0_int is using the new e0 value all the time. This is really unpredictable whether veriloga's cross function is based on blocking or non-blocking assignment. Any comments? \\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\ @(cross(V(ck_i)-0.5,+1,1e-12)) begin e0= (V(rxp) > V(rxn)) ? 1 : 0; e0_int = e0; ... up_int=up0+up1; // up_int is using old up0 value. end ... up0= (d0 + e0) %2; \\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\ |
Title: Re: Command Execution Sequence in VerilogA Post by Ken Kundert on Aug 2nd, 2010, 8:40pm The statements are executed in order. The concept of blocking is not used in an analog block. Instead, the statements contained within an @ block are simply skipped except at the instant at which the event occurs. -Ken |
Title: Re: Command Execution Sequence in VerilogA Post by Ari on Sep 30th, 2010, 11:42am Ken, I face the same problem with unpredictable order of execution. I contacted the CAD vendor, yet I could not find any specification in Verilog-AMS LRM 2.3.1 for order of execution in such cases. Can you please specify where this order of execution is stated in the LRM ? Regards, Ari |
Title: Re: Command Execution Sequence in VerilogA Post by Ken Kundert on Sep 30th, 2010, 3:16pm Section 5.2 of the LRM says that "All statements within the analog block shall be executed sequentially at a given point in time". -Ken |
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