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https://designers-guide.org/forum/YaBB.pl Design >> Analog Design >> Maneatis partial-swing delay cell https://designers-guide.org/forum/YaBB.pl?num=1281686331 Message started by raja.cedt on Aug 13th, 2010, 12:58am |
Title: Maneatis partial-swing delay cell Post by raja.cedt on Aug 13th, 2010, 12:58am hello, I am working for 1.8G pll for DDR3 purpose. I am getting around 14g kvco in ff corner, can any one please suggest which one shoud i change to reduce this. The following is my understanding on this cell 1.If i increase triode device(which is controlled by Vcontrol) i am getting more Kvco with extended range means usable control voltage range is also increased. 2. if i touch diode connected load i am seeing less kvco increment but entire range got shifted. 3. Differential pair devices are not giving much frequency range variation. Thnaks, Rajasekhar. |
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