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https://designers-guide.org/forum/YaBB.pl Design >> Analog Design >> What is the phase margin needed for DSM? https://designers-guide.org/forum/YaBB.pl?num=1283774319 Message started by moore on Sep 6th, 2010, 4:58am |
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Title: What is the phase margin needed for DSM? Post by moore on Sep 6th, 2010, 4:58am I know for close loop OPAMP or PLL, we always need 60 degree for stability and settling time performance. But I have in many paper, the phase margin of DSM loop filter is only 20 degree, or even worse! Should we watch the phase margin for DSM's stability criteria, or just looking the root locus will be enough to assure enough stability? Many Thanks! |
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Title: Re: What is the phase margin needed for DSM? Post by Mayank on Sep 20th, 2010, 2:39am Quote:
PM needed for stability of continuous-time ckts is not necessarily 60 degrees. It just depends on how much ringing in the response you can tolerate. Quote:
Z-domain analysis is needed for discrete time systems. But stability criterion is by far similar,if not same. Lesser the phase margin, higher the ringing in the response. Even if you approximate it as a continuous-time system, actual phase margin of the ckt is lesser than what you calculate with CT approximation. -- Mayank. |
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Title: Re: What is the phase margin needed for DSM? Post by raja.cedt on Sep 22nd, 2010, 8:28am hi moore, as mayank said ringing is the main concern rather than PM, in continuous time domain even 45 aslo acceptable in many cases (it all depends on settling time and acceptable ringing). But Phase Margin is less prefered parameter in z domain, main concern is wether your poles are in sides or not. If you want to approximate discreate domain with continuos domain (like plls and over sample data converters) phase margin has to be grater than 60, because sampled system has inherent delay which was not considered. Thanks, Rajasekhar. |
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Title: Re: What is the phase margin needed for DSM? Post by love_analog on Oct 11th, 2010, 6:28am If you want to approximate discreate domain with continuos domain (like plls and over sample data converters) phase margin has to be grater than 60, because sampled system has inherent delay which was not considered. I do not agree with this statement. You can approximate discrete with continuous if the sampling rate is high enough. In PLL, rule of thumb is the reference frequency is ~10x of the PLL BW. Nothing to do with Phase margin |
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Title: Re: What is the phase margin needed for DSM? Post by sync.guo on Oct 12th, 2010, 7:22pm Quote:
The criterion is whether the poles are inside or outside the unit circle, this is both we know. But I don't think you fully answer the question, it can be changed like this, how many margins should we save between the z domain pole and unit circle ? Quote:
They are two different things, I mean, stability and discrete-continuous approximation. For the stability criterion, it's not a "approximation" but just a "transformation" from z to laplace |
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Title: Re: What is the phase margin needed for DSM? Post by thechopper on Oct 20th, 2010, 4:11pm In addition DT to CT conversion is not direct in a SDM...for the models to be equivalent, the DT equivalent will need a pre=conditioning filter that makes both impulse responses exactly the same. It is true that delay might compromise stability, specially when considering such delay is signal dependent, as it happens in a real comparator (1-bit quantizer). Bottom line: delay is an important parameter to consider when it comes to stability in CT SDM Tosei |
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