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Design Languages >> Verilog-AMS >> problem in compling verilog.vams code in cadence
https://designers-guide.org/forum/YaBB.pl?num=1285759744

Message started by Amit_Analog on Sep 29^th, 2010, 4:28am

Title: problem in compling verilog.vams code in cadence
Post by Amit_Analog on Sep 29^th, 2010, 4:28am

Hi all,

When I compile my verilog.vams code in cadence, it gives the following error.

VAMS *E EPDS: parsing of verilog-ams file failed

Please let me know how to solve this problem.

In more detail:

I have a veriloga code, which has always statement inside ( so I guess this can only be simulated using verilog-ams). Hence when creating cellview, i choose the view as verilogams instead of veriloga. After exiting from the vi editor the icfb gives following error

VAMS *E EPDS: parsing of verilog-ams file failed

Please tell me solution for this problem. Do I have to change something in cadence setup?

Thanks a lot.

Regards,
Amit

Title: Re: problem in compling verilog.vams code in cadence
Post by Geoffrey_Coram on Sep 29^th, 2010, 8:42am

Amit_Analog wrote on Sep 29^th, 2010, 4:28am:

When I compile my verilog.vams code in cadence

Cadence is a company; please tell us what tool/simulator.

Quote:

VAMS *E EPDS: parsing of verilog-ams file failed

That sounds like a typo in your source code. Doesn't it point you to a line number or anything?

Title: Re: problem in compling verilog.vams code in cadence
Post by Amit_Analog on Sep 29^th, 2010, 11:15pm

Hi Geoffrey_Coram

thanks a lot for your reply.

1. I am using icfb to do it. I am not sure how it is linked to compiler. I create a cell view from library manager and create verilogams cell view. And after writing the code into it i close it and then it gives the error which i mentioned.

2. I think there is no typo, because it is happening with any code.

3. When i close the file there is something else also appearing in the command promot like this:
sh: /net/chopin/cad/cadence2/ius61/tools/bin/ncvlog : can not execute binary file

4. Is there any thing liks VAMS_ENABLE micro that we have to set.

Regards,
Amit

Title: Re: problem in compling verilog.vams code in cadence
Post by Geoffrey_Coram on Sep 30^th, 2010, 6:20am

Amit_Analog wrote on Sep 29^th, 2010, 11:15pm:

3. When i close the file there is something else also appearing in the command promot like this:
sh: /net/chopin/cad/cadence2/ius61/tools/bin/ncvlog : can not execute binary file

This is probably the first thing to address. Perhaps icfb is getting a non-zero exit status (error) when trying to run ncvlog, and it thinks that means ncvlog couldn't parse the code, but it really means that it didn't run at all.

Is that path correct? Are you trying to run the wrong binary? (linux vs solaris? -- does anyone use solaris any more?) If you just type that path at the command prompt, what happens?

Title: Re: problem in compling verilog.vams code in cadence
Post by Amit_Analog on Sep 30^th, 2010, 8:17am

Hi Geoffrey,

Thanks for your suggestions. I found out, in fact it is path error for ncvlog. I was still using the old one. Now its working fine. We are using linux. Thanks.

Regards,
Amit