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Simulators >> Logic Simulators >> verilog - print to file a 3d arrayHi, How do i export to file a 3d array in ver
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Message started by uzicohen10 on Oct 4^th, 2010, 2:21am

Title: verilog - print to file a 3d arrayHi, How do i export to file a 3d array in ver
Post by uzicohen10 on Oct 4^th, 2010, 2:21am

Hi,
How do i export to file a 3d array in verilog?
usually i use writememh with 2d bit array

example:
Declaration:
reg [7:0] arr [31:0];

write to file:
$writememh("PrintedArr.txt",arr);

Tnx in advance.