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Simulators >> RF Simulators >> noise simulation of dynamic latched comparator in Spectre
https://designers-guide.org/forum/YaBB.pl?num=1287451157

Message started by Raymond Yu on Oct 18^th, 2010, 6:19pm

Title: noise simulation of dynamic latched comparator in Spectre
Post by Raymond Yu on Oct 18^th, 2010, 6:19pm

Hello designers,

I understand there was already some discussion of this topic on the forum, but looks like none of them can be comprehensive. Appreciate that you can put thought over here make this topic beneficial to most of the users

I am simply referring to the dynamic latched comparator (preamp + regenerative latch) in which a clock/strobe signal is used to trigger the regeneration. As I know, accurate INPUT-referred noise simulation for such circuit is always difficult for the designers. The following are the solutions generally adopted by the designers

1) Ignore the noise from regenerative latch, only taking care of the noise of preamp or try to make sure that the noise from latch is negligible. I think this is quite common approach in the old days, but becoming more risky in the designs in which the preamp does not have enough gain, or even there is no preamp.

2) Use transient noise option. This is the one I am currently using, but extremely time-consuming and need more effort on the post-processing on the simulation result. Here are the steps, assuming a input-referred noise with Gaussian distribution
2.a: determine the comparator offset (systematic only, random mismatch not introduced yet) using a similar method as in http://www.designers-guide.org/Analysis/comparator.pdf and exclude its effect in the simulations afterward.
2.b: After excluding the effect of offset, impose a small difference on the comparator inputs, with transient noise turning on, run a quite long time transient simulation (>1000 clk cycles). Due to the existence of transience noise, the comparator output can be both HIGH or LOW. The probability of logic HIGH is a function of the noise level. By sweeping the input difference, a cumulative distribution curve can be obtained, as in the example in the attachment (ref: Nuzzo, De Bernardinis, Terreni & Van der Plas, "Noise Analysis of Regenerative Comparators for Reconfigurable ADC Architectures," TCAS, 2008). Buy curve fitting in Matlab, I can get the standard deviation (σ) of the Gaussian noise distribution.

The advantage of this method is in that similar testbench can be used in the measurement to compare with simulation. But as I mentioned, quite time-consuming (at least 20 swept points, >1000 clk cycles per point), and need post-processing in Matlab.

3) PSS/PNOISE. I am quite familiar with the PSS/PNOISE setup as in the sw-cap filter and VCO circuits. But met significant difficulties in dynamic latched comparator simulation. What I am currently doing is as below
3.a: Given a clock frequency Fclk, a square-wave comparator input with frequency of Fclk/2 is applied.
3.b: A toggled comparator output with frequency Fclk/2 can be obtained.
3.c: By PSS/PNOISE, a output noise/jitter can be obtained, even though I am not quite sure whether it makes sense.
3.d: Did not find way to read out the input-referred noise yet, as I did not know how to determine the gain of such comparator in Spectre, as it is highly time-varying.

Actually I am not confident with this setup, does anybody think it is possible to get a input-referred noise for the comparator directly? Any suggestion is highly appreciated.

Title: Re: noise simulation of dynamic latched comparator in Spectre
Post by Ken Kundert on Oct 18^th, 2010, 10:27pm

Concerning method 3 (PSS/PNoise). You say you had difficulties with these simulations, can you describe the problem you had.

Concerning the input referred noise, generally if you specify the input source to the noise analysis, it naturally computes the input referred noise. Is that not working?

-Ken

Title: Re: noise simulation of dynamic latched comparator in Spectre
Post by pancho_hideboo on Oct 19^th, 2010, 7:11am

Raymond Yu wrote on Oct 18^th, 2010, 6:19pm:

but looks like none of them can be comprehensive.

I don't think so.

Raymond Yu wrote on Oct 18^th, 2010, 6:19pm:

3.d: Did not find way to read out the input-referred noise yet,
as I did not know how to determine the gain of such comparator in Spectre, as it is highly time-varying.

If your interests are quantities averaged over one period, there is no reason why you can't adopt PSS/PAC and PSS/Pnoise(sources).

Conventional AC and Noise analysis at specific time during Transient Analysis are also valuable for your application.
http://www.designers-guide.org/Forum/YaBB.pl?num=1272909056

Title: Re: noise simulation of dynamic latched comparator in Spectre
Post by Raymond Yu on Oct 21^st, 2010, 6:59am

Ken Kundert wrote on Oct 18^th, 2010, 10:27pm:

Hi Ken,

Thanks for the reply. I agree that from the PSS/PNOISE simulation, whenever you set the input noise, you can read the input-referred noise. But my concern is like this, we both know that for normal continuous-time circuits(amplifiers, filters...) and sw-cap circuits, you can always obtain a "gain" with AC or PAC simulation and cross-check with the ratio of output and input noise. But for circuits which doesn't have a steady state, like dynamic latched comparator, how should you define a gain for them?
The reason I started this discussion is in that, I am quite confident with the result given by the method 2 as in my primary post, but it is quite different from the one obtained by PSS/PNOISE. Therefore, I wondered whether I did something wrong, or any specific issue I should pay attention to in the PSS/PNOISE simulation of such comparator. Thank again

Title: Re: noise simulation of dynamic latched comparator in Spectre
Post by Raymond Yu on Oct 21^st, 2010, 7:07am

pancho_hideboo wrote on Oct 19^th, 2010, 7:11am:

Raymond Yu wrote on Oct 18^th, 2010, 6:19pm:

but looks like none of them can be comprehensive.

I don't think so.

Please leave the post link(s) here, thanks.

Raymond Yu wrote on Oct 18^th, 2010, 6:19pm:

3.d: Did not find way to read out the input-referred noise yet,
as I did not know how to determine the gain of such comparator in Spectre, as it is highly time-varying.

Again, I tried to figure out how the gain is defined in such circuit.
I will try this and let you know the outcome, thanks

Title: Re: noise simulation of dynamic latched comparator in Spectre
Post by vp1953 on Oct 21^st, 2010, 6:27pm

Hi Raymond,

Why is there a need to measure input referred noise? I mean could you not compare the results of PSS/PNOISE and transient noise just using the output noise/jitter.

While one could conjecture on various way to measure input referred noise, I am not sure if any of them are physically meaningful or insightful for the reason you stated that the latch has a varying gain.

Quote:

2) Use transient noise option. This is the one I am currently using, but extremely time-consuming and need more effort on the post-processing on the simulation result. Here are the steps, assuming a input-referred noise with Gaussian distribution
2.a: determine the comparator offset (systematic only, random mismatch not introduced yet) using a similar method as in http://www.designers-guide.org/Analysis/comparator.pdf and exclude its effect in the simulations afterward.
2.b: After excluding the effect of offset, impose a small difference on the comparator inputs, with transient noise turning on, run a quite long time transient simulation (>1000 clk cycles). Due to the existence of transience noise, the comparator output can be both HIGH or LOW. The probability of logic HIGH is a function of the noise level. By sweeping the input difference, a cumulative distribution curve can be obtained, as in the example in the attachment (ref: Nuzzo, De Bernardinis, Terreni & Van der Plas, "Noise Analysis of Regenerative Comparators for Reconfigurable ADC Architectures," TCAS, 2008). Buy curve fitting in Matlab, I can get the standard deviation (σ) of the Gaussian noise distribution.

I am wondering why your latch turns HIGH with a small difference voltage applied to its input. Is the small difference voltage such that it can trip with a small noise voltage arising say from the gates of input transistors? If you can post a schematic of your setup that would be great.

Title: Re: noise simulation of dynamic latched comparator in Spectre
Post by Raymond Yu on Oct 22^nd, 2010, 1:12am

vp1953 wrote on Oct 21^st, 2010, 6:27pm:

Hi,
The comparator will be used in a swiched-cap SAR ADC, input-referred noise is needed to decide the design constraints for the ADC.
I agree that for some applications in which the BER is the main concern for instance, taking care of noise/jitter at the output is almost good enough.

vp1953 wrote on Oct 21^st, 2010, 6:27pm:

The picture I attached is a little misleading as I failed to show the label of Y-axis. It is actually the probability of output "HIGH"in stead of voltage. Sorry for the inconvenience caused.

Title: Re: noise simulation of dynamic latched comparator in Spectre
Post by pancho_hideboo on Oct 22^nd, 2010, 2:32am

Raymond Yu wrote on Oct 18^th, 2010, 6:19pm:

Again, I tried to figure out how the gain is defined in such circuit.

You have four options as definition of Gain.
(1) Gain during Sample mode(Comparate mode)
(2) Gain at transition from Sample mode to Latched mode.
(3) Gain during Latched mode
(4) Gain averaged over one clock period.

Here you have to treat an input signal as large.
If you treat an input signal as small, (3) will be same as (2).

Raymond Yu wrote on Oct 21^st, 2010, 6:59am:

But for circuits which doesn't have a steady state, like dynamic latched comparator

Dynamic latched comparator surely have steady state, as far as both latched clock and input signal are periodic.
Here they don't have to be co-periodic.

If they are co-periodic, you can adopt PSS/PAC/Pnoise.
If they are not co-periodic, you have to use QPSS/QPAC/QPnoise.

Raymond Yu wrote on Oct 21^st, 2010, 6:59am:

but it is quite different from the one obtained by PSS/PNOISE.
Therefore, I wondered whether I did something wrong,
or any specific issue I should pay attention to in the PSS/PNOISE simulation of such comparator.

Show me your netlists regarding analysis statements and signal source definitions both for PSS/Pnoise and Transient-Noise analyses.

Transient-Noise Analysis is no more than Monte Carlo trial.
You can get same statistical characteristics by small signal noise analysis, if you adopt small signal noise analysis correctly and can understand its results correctly.

This is similar to Bit Error Simulation for AM or ASK system.
On the other hand, we have to rely on Monte Carlo true large signal analysis to evaluate BER of PM or FM system.

You can't do BER simulation using small signal analysis.
Simply you can estimate BER from results of small signal noise analysis for AM system.
http://www.designers-guide.org/Forum/YaBB.pl?num=1259714206/2#2

Raymond Yu wrote on Oct 22^nd, 2010, 1:12am:

The comparator will be used in a swiched-cap SAR ADC, input-referred noise is needed to decide the design constraints for the ADC.

See http://www.designers-guide.org/Forum/YaBB.pl?num=1258339986/48#48

Title: Re: noise simulation of dynamic latched comparator in Spectre
Post by Taimur Gibran on Nov 26^th, 2010, 12:31pm

I am quite sure that Mr. pancho_hideboo didn't get the whole picture.
The estimation of noise in latched comparator is not a trivial task, and there are just 2 efficient approaches I know. One of them was cited before, and is from Nuzzo et al. The other one is also from TCAS-1, search for "Simulation and Analysis of Random Decision Errors
in Clocked Comparators", by Kim, J. et al. This paper will answer your questions about time-varying gain.

Again, this is not a straightforward procedure, and will take some amount of scripting and post-processing. So, in opposition to what Mr.
pancho said, this topic can be useful to a lot of people that are actually able to understand the problem.

Title: Re: noise simulation of dynamic latched comparator in Spectre
Post by Taimur Gibran on Nov 27^th, 2010, 5:37am

Well, if the procedure is that straightforward, I would like to know it. Nowadays, I am relying on 100's of PAC simulations and a huge ammount of post-processing to get the input-referred noise, following the guidelines of Mr. Jaeha Kim paper.

So, maybe if Mr. pancho has a better approach, I would definitely enjoy to have a step-by-step walkthrough.

Title: Re: noise simulation of dynamic latched comparator in Spectre
Post by wghabrial on Mar 16^th, 2011, 11:21am

Hi

I am doing exactly the same simulation that Raymond is going.

Transient Noise Method
I apply a dc voltage to the comparator input and clock the comparator many times and calculate the probability of getting '1'. Then I repeat this by sweeping the input and drawing the probability density function. Fitting it to the erf function produces the equivalent input noise.

This method is logical and straightforward.

PNoise method
I apply a sine wave at the one of the comparator inputs and a threshold voltage on the other input. I chose the input frequency to be half the clock frequency so everything is periodic. Then I measure the jitter (Jc) at the zero crossing of the input. I then multiply this jitter by the slope of the signal (which is the frequency) to get the equivalent input noise.

The 2 results do not match and I am not sure which one is the correct one. I was wondering if someone has figured this out and has a reliable method of doing it.

Thanks

Title: Re: noise simulation of dynamic latched comparator in Spectre
Post by weber8722 on Oct 5^th, 2012, 1:15am

Hi,

using transient noise is by far the best method. Spectre pnoise sim with jitter analysis is also fine, and from jitter you can calculate back the effective voltage noise. As long no bit errors occur from noise pnoise and tran noise are pretty much in synch :).
Generally the jitter and noise depends also on input voltage overdrive level!!! If this is too low SNR is too low and BER rises dramatically and pnoise (green curve) would not show this effect, only tran noise does it (red).

Bye Stephan

Title: Re: noise simulation of dynamic latched comparator in Spectre
Post by ywguo on Oct 22^nd, 2012, 6:01am

Hi Stephan,

Your plot is interesting. I want to know how you plot the spectrum of JitterriseRMS (that curve in red)? Do you run transient noise simulation and do DFT on the jitter result?

Thanks
Yawei

Title: Re: noise simulation of dynamic latched comparator in Spectre
Post by ywguo on Oct 23^rd, 2012, 5:51am

Hi Stephan,

As what you said, the jitter and noise depends also on input voltage overdrive level. I run a few simulations with different input level, the resulted jitter varies very much. It seems that pnoise method is not easy to use for measure the input noise of latch/comparator. What is your setup for the simulation? I have some trouble in my computer. I will paste a few plots tomorrow.

Best Regards,
Yawei

Title: Re: noise simulation of dynamic latched comparator in Spectre
Post by weber8722 on Nov 22^nd, 2012, 2:29am

Hi Yawei,

My tran noise based plot is created quite simple:

as I remember, I run the tran noise for e.g. 1000 periods or more.
Then I use the Viva calculator to get the jitter vs periods.
On this I can calculate the standard deviation which is the RMS jitter. So no DFT is done!!

Bye Stephan

Title: Re: noise simulation of dynamic latched comparator in Spectre
Post by ywguo on Nov 22^nd, 2012, 7:12pm

Hi Stephan,

As that time I made a mistake. I thought your plot is a jitter spectrum. :-[ Now I understand your method.

Best Regards,
Yawei

Title: Re: noise simulation of dynamic latched comparator in Spectre
Post by Pravesh Kumar Saini on Sep 3^rd, 2013, 10:17pm

weber8722 wrote on Nov 22^nd, 2012, 2:29am:

Hi Stephan,
I just want to understand your setup, 1. Hva eyou included the systematic offset as mentioned by the Mr . raymond, 2. by jitter vs period, do you mean the variation of sampler output period relative to ideal period vs period? 3. How do you calculate back the input referred rms jitter or dc gain to calculate the same.
Regards,
Pravesh