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Design >> Analog Design >> MiM cap in series with nmos capacitor
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Message started by newic on Oct 23^rd, 2010, 7:10pm

Title: MiM cap in series with nmos capacitor
Post by newic on Oct 23^rd, 2010, 7:10pm

is it a common practice to put nmos capacitors underneath of Mim Cap (M5-M6) since the Mim cap underneath is blank. The mim cap are used in the low-passed filter in my PLL design.

Normally I see the pll design with only mim cap only. Any reason for that?
I am aware that nmos cap capacitance is dependent on Vg and has lower Q than mim cap.
What if the vctrl voltage is near to power supply vdd, then the Vg is not a matter already, is it true?

Title: Re: MiM cap in series with nmos capacitor
Post by raja.cedt on Oct 23^rd, 2010, 10:11pm

hi,
its not general practice is to keep any thing underneath the MIM cap because it will add bottom plate capacitance, it would create problems in circuits. But for pll loop-filter its very difficult to put MIM because it occupies lot of area. For loop filter why Q will be matter, may be it slightly changes loop dynamic.

Thanks.

Title: Re: MiM cap in series with nmos capacitor
Post by newic on Oct 25^th, 2010, 6:21am

raja.cedt wrote on Oct 23^rd, 2010, 10:11pm:

But for pll loop-filter its very difficult to put MIM because it occupies lot of area.

What do you use for the PLL loop filter? NMOS cap??

Title: Re: MiM cap in series with nmos capacitor
Post by RobG on Oct 29^th, 2010, 8:15am

newic wrote on Oct 23^rd, 2010, 7:10pm:

is it a common practice to put nmos capacitors underneath of Mim Cap (M5-M6) since the Mim cap underneath is blank. The mim cap are used in the low-passed filter in my PLL design.

It is probably in parallel, not series. Parallel connection is done to increase the cap for a given amount of area. If your design can tolerate the peculiarities of a MOS cap it is a good way to save area (if the design rules allow it). On the other hand, putting them in series is a good way to get laid off ;)

rg

Title: Re: MiM cap in series with nmos capacitor
Post by raja.cedt on Oct 31^st, 2010, 2:05am

hi newic,
i am using nmos cap.

Thanks.

Title: Re: MiM cap in series with nmos capacitor
Post by panditabupesh on Nov 24^th, 2010, 2:04pm

One would avoid nmos cap for two reasons:
1. leakage
2. Dependence of capacitance value on gate voltage. Due to some startup conditions if the cap value is drastically different from ideal value the loop may never recover.

Bupesh

Title: Re: MiM cap in series with nmos capacitor
Post by raja.cedt on Nov 24^th, 2010, 9:22pm

hi Bupesh,
but normally in pll loop filter design as a main filtering cap nmos is the best up to my knowledge, because it will be around 500pf or some thing for plls BW with around 5MHz. is it possible for you to put apart from this cap like metal or some thing?

Thanks.

Title: Re: MiM cap in series with nmos capacitor
Post by panditabupesh on Nov 25^th, 2010, 6:55am

Hi,
In that case I think one would use a thick oxide version to reduce leakage and some kind of native device (or nmos in nwell) to reduce the cap dependence on gate voltage.

Bupesh

Title: Re: MiM cap in series with nmos capacitor
Post by raja.cedt on Nov 25^th, 2010, 7:31pm

hi,
i completely agree with you, to reduce the leakage thick oxide is fine but in every process you don't get all devices you want and because of leakage no need to rul out nmos cap as long as you are ok with reference spur you got is fine. Once i did pll for wireless application there i have used metal caps there i can't use any mos family which gave me 35x more area.

Thanks.