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https://designers-guide.org/forum/YaBB.pl Design Languages >> Verilog-AMS >> idt() function in hspice simulator https://designers-guide.org/forum/YaBB.pl?num=1287902279 Message started by neoflash on Oct 23rd, 2010, 11:37pm |
Title: idt() function in hspice simulator Post by neoflash on Oct 23rd, 2010, 11:37pm I used idt() function in hspice simulator for a VCO. However, I got trouble that sometimes the idt() output result may jump erroneously. Is there any option that I can help with this issue? |
Title: Re: idt() function in hspice simulator Post by Marq Kole on Nov 17th, 2010, 6:36am You will need to provide a little more information if you want us to help you. Anyway, when you mentino VCO I would suggest you have a look at the idtmod() operator instead of the idt() operator. Cheers, Marq |
Title: Re: idt() function in hspice simulator Post by neoflash on Nov 17th, 2010, 11:58am Marq Kole wrote on Nov 17th, 2010, 6:36am:
idtmod() works much better and solves the problem. Thanks. |
Title: Re: idt() function in hspice simulator Post by neoflash on Nov 20th, 2010, 3:28pm finesim doesn't support this special idtmod() function. sucks. |
Title: Re: idt() function in hspice simulator Post by Marq Kole on Dec 8th, 2010, 8:12am Hi, That's weird - I'm using finesim 2010.08.00 and the code below runs just fine: Code:
Are you using a recent version? We have no trouble with the Verilog-A support of finesim. Cheers, Marq |
Title: Re: idt() function in hspice simulator Post by neoflash on Dec 8th, 2010, 12:11pm We are using the most recent version. |
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