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Modeling >> Behavioral Models >> How can I simulate sampling jitter in simulink?
https://designers-guide.org/forum/YaBB.pl?num=1288815367

Message started by ray_wang on Nov 3^rd, 2010, 1:16pm

Title: How can I simulate sampling jitter in simulink?
Post by ray_wang on Nov 3^rd, 2010, 1:16pm

I know the equation, but also want to give a simulation plot of SNR (Noise from sampling jitter) for an ADC. I tried to search websites but cannot find the answer.
The key problem is how to generate a clock with controllable jitter, which cannot be found that in simulink help. Thanks a lot!

Title: Re: How can I simulate sampling jitter in simulink?
Post by raja.cedt on Nov 7^th, 2010, 11:09pm

why don't try with random functions like RAND. Here you can specify mean and variance of the clock period.

Thanks.

Title: Re: How can I simulate sampling jitter in simulink?
Post by love_analog on Mar 3^rd, 2011, 2:14pm

I saw the same post in edaboard.

There is another thread on that very board that you can refer to
http://www.edaboard.com/thread57284.html