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Simulators >> AMS Simulators >> Error message simulating an AMS code using (Mentor) ICstudio Design Architect-IC
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Message started by Shady Adly on Nov 27th, 2010, 1:02pm

Title: Error message simulating an AMS code using (Mentor) ICstudio Design Architect-IC
Post by Shady Adly on Nov 27th, 2010, 1:02pm

Hi,

I am new to both Verilog AMS and Mentor tools, but I need it for my graduation project.

I use Mentor tools, the simulator is ICstudio (Design Architect-IC v2008.2_1.1)

I wrote this simple code to make sure the design flow is working.

`include "disciplines.h"
module AMS_Verilog_AMS (in,out);
electrical in,out;
input in;
output out;
analog begin
V(out) <+ 3 * V(in);
end
endmodule

After compiling the code I got no errors, then I created a new symbol, but after I checked the 'check HDL' tab I found this error message

//  Starting HDL compiler ... please wait
** Warning: (vsim-14) Failed to open "/tools/mentor/Projects/tester3.proj/mgc/.hdl_lib_a2008.2_p64/ADMS/modelsim.ini" specified by the MODELSIM environment variable. Using "modelsim.ini" instead.
No such file or directory. (errno = ENOENT)
Compiling file: /tools/mentor/Projects/tester3.proj/Graduation_Project.lib/default.group/hdl.views/src/AMS.va
Compiling Module AMS_Verilog_AMS
______________________________________________
//  Starting HDL registration ... please wait
Error: An unexpected exit code(5) was returned from model registration

And now I can't put my block inside the design architect schematic!!

Any help would be really appreciated,
Thanks,

Shady Adly

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