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Message started by AnalogDE on Dec 1st, 2010, 3:52pm

Title: Crude current reference circuit
Post by AnalogDE on Dec 1st, 2010, 3:52pm

I want to build a crude current reference, say 10uA output with +/- 30-40% variation (or better) across all PVT corners.  Assume that there is no trimming.  I have some pseudo bandgap vref voltages available = 1.0, 1.3V.

Can someone suggest some good schemes for doing this?

Title: Re: Crude current reference circuit
Post by carlgrace on Dec 1st, 2010, 4:01pm

I think the standard circuit for a current reference will be more than good enough.  Put the bandgap voltage into the non-inverting input of an op amp.  Have the opamp drive the gate of a PMOS device.  Then take the current of the PMOS device into a resistor to ground.  Route that voltage (the drain of the PMOS) to the inverting input of the op amp.  The negative feedback will set the current through the PMOS device to Vref/R.  Choose R to give you the current you want and then connect other PMOS devices in parallel to generate as many currents as you need.

Carl

Title: Re: Crude current reference circuit
Post by vp1953 on Dec 1st, 2010, 4:17pm

Hi AnalogDE,

As an alternative to what was suggested by Carlgrace, you can use a "CMOS Bandgap" (Tsividis et al ) using MOS transistors in subthreshold mode (the circuit will work as current reference even if the transistors are not in weak inversion, which might be the better option for your reference of 10uA).

The whole circuit uses 4 transistors and a resistor ~100k value and I think your stated variation should be easily met across PVT.

Title: Re: Crude current reference circuit
Post by carlgrace on Dec 2nd, 2010, 11:00am

vp1953,

Correct me if I'm wrong, but are you referring to the CMOS bandgap reference Tsividis co-presented in the JSSC in June 1979?  If so, I think it is redundant since AnalogDE already has got a bandgap-derived voltage available.  AnalogDE would still need some loop to generate a constant current based on that voltage.

Come to think of it, the simplest solution might be to connect the available bandgap voltage directly to a PMOS device with a really small W/L ratio to lower its gm.  Since the AnalogDE's accuracy requirements are very loose, that may be good enough, even with PVT variations.

Another idea is to use a self-biased current source.  You can see one in Gray, Hurst, Lewis, and Meyer for example.  The downside of that one is that you would need a startup circuit.  I'm thinking the single PMOS device would be the easiest.  Give it a try and let me know if it works!

Carl

Title: Re: Crude current reference circuit
Post by Dan Clement on Dec 2nd, 2010, 11:28am

Why can't you just use a resistor to tie a diode connected transistor current source to a rail?

Or is power supply rejection a big problem...

Title: Re: Crude current reference circuit
Post by AnalogDE on Dec 2nd, 2010, 11:51am

I like the idea of connecting one of my VREFs to a weak PMOS... I'll try that and see what I get.

Dan:  I'm worried about supply variation since I have a large VDD operating range.

Thank you all for your suggestions.


Title: Re: Crude current reference circuit
Post by RobG on Dec 2nd, 2010, 12:33pm

I'd bet that you could just connect the 1.3 V across the gate-source of a long (say 10um) NMOS and take the current from the drain. The temp-co when you do this with ~1.2 V is pretty small, as well as the process variations (VT is the major source of variation). You could also degenerate it a bit with a resistor to change things a bit it necessary. Can't get any simpler than that.

Another simple circuit is to build a simple two stage opamp (PMOS second stage) with a resitive load and mirror off the PMOS device. The diff pair is biased with a resistor and the non-inverting node is connected to the reference... like Carl Grace's circuit except using a simple, crude opamp-type circuit.

Title: Re: Crude current reference circuit
Post by carlgrace on Dec 2nd, 2010, 3:50pm

Rob,

I think we had the same idea about putting the 1.3V across a long device.  I guess whether it is PMOS or NMOS depends on the supply and whether AnalogDE needs a source or a sink.  I liked your idea about degenerating the device.  AnalogDE should probably do that regardless.

If the 1.3V Vgs that Rob's method provides is too much to control the current, you can also try using a resistive voltage divider to drop to down before you apply it to the gate.  Make sure that the resistors are pretty big so you don't load your bandgap.

AnalogDE: come to think of it, since you have a large VDD operating range maybe Rob's method with the degeneration is the ticket.

Title: Re: Crude current reference circuit
Post by vp1953 on Dec 2nd, 2010, 4:51pm

Hi Carlgrace,


Quote:
Correct me if I'm wrong, but are you referring to the CMOS bandgap reference Tsividis co-presented in the JSSC in June 1979?  If so, I think it is redundant since AnalogDE already has got a bandgap-derived voltage available.  AnalogDE would still need some loop to generate a constant current based on that voltage.


That is the paper i am referring to. Bandgaps can also generate currents, not just voltages. If there is a bandgap circuit already available, then just mirror the current in either leg of the bandgap whichever is closer to the desired value (maybe with some scaling). Same with the CMOS bandgap without the need for a loop.

I agree if a voltage reference is available, connecting a properly scaled MOS to it can provide a simple current reference

Title: Re: Crude current reference circuit
Post by carlgrace on Dec 3rd, 2010, 8:10am

Hi vp1953,


vp1953 wrote on Dec 2nd, 2010, 4:51pm:
Bandgaps can also generate currents, not just voltages. If there is a bandgap circuit already available, then just mirror the current in either leg of the bandgap whichever is closer to the desired value (maybe with some scaling). Same with the CMOS bandgap without the need for a loop.

I agree if a voltage reference is available, connecting a properly scaled MOS to it can provide a simple current reference


My assumption was that AnalogDE would be getting the bandgap voltage externally somehow (like from a voltage reference input to the chip or even a reference IP) so it would not be possible to access an internal node and mirror an internal current.  If AnalogDE has access to the bandgap block, by all means mirroring that current is the easiest way to go.  Good idea.

AnalogDE, I would say if you have access to the internal nodes of the bandgap, do as vp1953 has suggested, otherwise apply the bandgap voltage to a large device with a very small W/L ratio and with source degeneration.

Good luck,
Carl

Title: Re: Crude current reference circuit
Post by mowiehowie on Dec 3rd, 2010, 9:30am


carlgrace wrote on Dec 1st, 2010, 4:01pm:
I think the standard circuit for a current reference will be more than good enough.  Put the bandgap voltage into the non-inverting input of an op amp.  Have the opamp drive the gate of a PMOS device.  Then take the current of the PMOS device into a resistor to ground.  Route that voltage (the drain of the PMOS) to the inverting input of the op amp.  The negative feedback will set the current through the PMOS device to Vref/R.  Choose R to give you the current you want and then connect other PMOS devices in parallel to generate as many currents as you need.

Carl


Carl, wouldn't it create a positive feedback since PMOS drain will have an inverted output ? think he should connect vref to the inverting input and PMOS's drain to the non-inverting input.

Title: Re: Crude current reference circuit
Post by AnalogDE on Dec 3rd, 2010, 10:08am

I think I'm going to go with a weak NMOS with gate connected to my VREF.  
What does source degeneration buy me and how do I go about sizing the resistor?  (I need to review my theory...)  

Also, for a high valued resistor it'll have to be implemented as an nwell resistor -- so another source of variation in process and tempco....

Thanks all.

Title: Re: Crude current reference circuit
Post by RobG on Dec 3rd, 2010, 10:30am


AnalogDE wrote on Dec 3rd, 2010, 10:08am:
I
What does source degeneration buy me and how do I go about sizing the resistor?  (I need to review my theory...)  

Also, for a high valued resistor it'll have to be implemented as an nwell resistor -- so another source of variation in process and tempco....


You can probably get away without it, but it will add another degree of freedom if the pure NMOS does not work. An ideal resistor will make the source less sensitive to variations in Vt since its current is proportional to V, not V^2. It will also increase output impedance compared to a pure NMOS of the same length. Not sure if the Nwell will make it better or worse.

For sizing you have two extremes:
1) NMOS is weak inversion with a resistor: I =~ (Vref-Vt)/R
2) Pure NMOS: I =~ βW/L(Vref-Vt)^2

Play around with different values between these two extremes to get a decent PVT performance and then scale everything to get the proper current.

Title: Re: Crude current reference circuit
Post by mahan on Dec 4th, 2010, 9:40am

Hi analogDE

you should use ur bgr to bias the NMOS transistor and connect  two or more PMOS transistor on it upto VDD  making drain and gate terminal short for PMOS .Then u can generate the desired current source by adjusting the W/L ratio of other transistor which gate is connected to the PMOS  gate.(U should used the gate of PMOS to bias the other transistor to get current reference follow the concept of current mirror )

Title: Re: Crude current reference circuit
Post by Isabelle on Dec 7th, 2010, 3:07am

Hello,
The simplest solution might be to connect the available bandgap voltage directly to a PMOS device with a really small W/L ratio to lower its gm.  Since the AnalogDE's accuracy requirements are very loose, that may be good enough, even with PVT variations..... :)

Title: Re: Crude current reference circuit
Post by RobG on Dec 7th, 2010, 5:41am


Isabelle wrote on Dec 7th, 2010, 3:07am:
Hello,
The simplest solution might be to connect the available bandgap voltage directly to a PMOS device with a really small W/L ratio to lower its gm.  Since the AnalogDE's accuracy requirements are very loose, that may be good enough, even with PVT variations..... :)

Hi Isabelle,
Yes, that has been suggested by Carl and myself (but I suggested an NMOS). I'm curious how you or Carl would connect the PMOS. With an NMOS it is simple: Gate to Vref, and source to GND, and take the current from the drain. But how would you connect a PMOS?

rg

Title: Re: Crude current reference circuit
Post by Frank Wiedmann on Dec 7th, 2010, 6:32am

Is it just me who finds it strange that Isabelle's contribution is an exact quote from carlgrace (reply #3) and that there is a link to a "Dogs for sale" website in her signature? Ken?

Title: Re: Crude current reference circuit
Post by RobG on Dec 7th, 2010, 6:35am


Frank Wiedmann wrote on Dec 7th, 2010, 6:32am:
Is it just me who finds it strange that Isabelle's contribution is an exact quote from carlgrace (reply #3) and that there is a link to a "Dogs for sale" website in her signature? Ken?

LOL... you are correct

Title: Re: Crude current reference circuit
Post by carlgrace on Dec 7th, 2010, 4:23pm


Isabelle wrote on Dec 7th, 2010, 3:07am:
Hello,
The simplest solution might be to connect the available bandgap voltage directly to a PMOS device with a really small W/L ratio to lower its gm.  Since the AnalogDE's accuracy requirements are very loose, that may be good enough, even with PVT variations..... :)


I am so honored that my suggestion could be used by Isabelle in her spam.

Title: Re: Crude current reference circuit
Post by carlgrace on Dec 7th, 2010, 4:27pm


RobG wrote on Dec 7th, 2010, 5:41am:

Isabelle wrote on Dec 7th, 2010, 3:07am:
Hello,
The simplest solution might be to connect the available bandgap voltage directly to a PMOS device with a really small W/L ratio to lower its gm.  Since the AnalogDE's accuracy requirements are very loose, that may be good enough, even with PVT variations..... :)

Hi Isabelle,
Yes, that has been suggested by Carl and myself (but I suggested an NMOS). I'm curious how you or Carl would connect the PMOS. With an NMOS it is simple: Gate to Vref, and source to GND, and take the current from the drain. But how would you connect a PMOS?

rg

Rob,

It totally depends on the VDD range and whether AnalogDE needs to source or sink a current.  For example, if the BG voltage is 1.1 V, for instance, it might be challenging to keep an NMOS under control with such a large VGS.  If VDD where 1.8 V, for instance you could connect it like you suggested AnalogDE connect the NMOS: Vref to gate, source to VDD, drain to load.  Either way works, depending on the situation.

AnalogDE said the plan was to go with the weak NMOS.  I think it will work.

Title: Re: Crude current reference circuit
Post by RobG on Dec 8th, 2010, 7:26am


carlgrace wrote on Dec 7th, 2010, 4:27pm:

RobG wrote on Dec 7th, 2010, 5:41am:

Isabelle wrote on Dec 7th, 2010, 3:07am:
Hello,
The simplest solution might be to connect the available bandgap voltage directly to a PMOS device with a really small W/L ratio to lower its gm.  Since the AnalogDE's accuracy requirements are very loose, that may be good enough, even with PVT variations..... :)

Hi Isabelle,
Yes, that has been suggested by Carl and myself (but I suggested an NMOS). I'm curious how you or Carl would connect the PMOS. With an NMOS it is simple: Gate to Vref, and source to GND, and take the current from the drain. But how would you connect a PMOS?

rg

Rob,

It totally depends on the VDD range and whether AnalogDE needs to source or sink a current.  For example, if the BG voltage is 1.1 V, for instance, it might be challenging to keep an NMOS under control with such a large VGS.  If VDD where 1.8 V, for instance you could connect it like you suggested AnalogDE connect the NMOS: Vref to gate, source to VDD, drain to load.  Either way works, depending on the situation.

AnalogDE said the plan was to go with the weak NMOS.  I think it will work.


Oh, ok. I don't like doing stuff like that (even though it was strongly endorsed by a lady selling dogs :) ). The reason is that Vref is bypassed to ground so any AC power supply noise appears across the PMOS gate/source and gets put onto the current (Iac=gm*Vnoise). Most applications can handle the variation with Vdd, but not the AC noise, especially when mismatches are considered.

The larger Vgs is actually an advantage since it lowers the gm. It also steers the temp co towards PTAT, which is better for most circuits. There is also a point where the temp co is zero. This point has been around Vgs=1.2 V when I've played with it, although I'm sure it depends on the Vt of the device.

Adding resistive degeneration decreases the gm even more.

That's my story, and I'm sticking to it  :P .

Rob
-----------
No I don't sell dogs.

Title: Re: Crude current reference circuit
Post by mowiehowie on Dec 8th, 2010, 10:18am


Isabelle wrote on Dec 7th, 2010, 3:07am:
Hello,
The simplest solution might be to connect the available bandgap voltage directly to a PMOS device with a really small W/L ratio to lower its gm.  Since the AnalogDE's accuracy requirements are very loose, that may be good enough, even with PVT variations..... :)



do you sell only raw dogs ? any hot dogs ?

Title: Re: Crude current reference circuit
Post by carlgrace on Dec 8th, 2010, 1:13pm


RobG wrote on Dec 8th, 2010, 7:26am:

carlgrace wrote on Dec 7th, 2010, 4:27pm:

RobG wrote on Dec 7th, 2010, 5:41am:

Isabelle wrote on Dec 7th, 2010, 3:07am:
Hello,
The simplest solution might be to connect the available bandgap voltage directly to a PMOS device with a really small W/L ratio to lower its gm.  Since the AnalogDE's accuracy requirements are very loose, that may be good enough, even with PVT variations..... :)

Hi Isabelle,
Yes, that has been suggested by Carl and myself (but I suggested an NMOS). I'm curious how you or Carl would connect the PMOS. With an NMOS it is simple: Gate to Vref, and source to GND, and take the current from the drain. But how would you connect a PMOS?

rg

Rob,

It totally depends on the VDD range and whether AnalogDE needs to source or sink a current.  For example, if the BG voltage is 1.1 V, for instance, it might be challenging to keep an NMOS under control with such a large VGS.  If VDD where 1.8 V, for instance you could connect it like you suggested AnalogDE connect the NMOS: Vref to gate, source to VDD, drain to load.  Either way works, depending on the situation.

AnalogDE said the plan was to go with the weak NMOS.  I think it will work.


Oh, ok. I don't like doing stuff like that (even though it was strongly endorsed by a lady selling dogs :) ). The reason is that Vref is bypassed to ground so any AC power supply noise appears across the PMOS gate/source and gets put onto the current (Iac=gm*Vnoise). Most applications can handle the variation with Vdd, but not the AC noise, especially when mismatches are considered.

The larger Vgs is actually an advantage since it lowers the gm. It also steers the temp co towards PTAT, which is better for most circuits. There is also a point where the temp co is zero. This point has been around Vgs=1.2 V when I've played with it, although I'm sure it depends on the Vt of the device.

Adding resistive degeneration decreases the gm even more.

That's my story, and I'm sticking to it  :P .

Rob
-----------
No I don't sell dogs.


You're right Rob.  Your idea is the way to go.  I didn't think about the noise... I figured if AnalogDE had such a loose tolerance on the matching then most likely there wasn't a big requirement on the noise.  I do get your point.  Good luck getting the tempco hitting the match zero spot.  Reminds me of gm stages in RF circuits that try to hit the magical zero third-order distortion point.

Carl

PS I'm pretty sure Isabelle would have sold you a dog pre-cooked if you paid her enough...

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