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https://designers-guide.org/forum/YaBB.pl Simulators >> Circuit Simulators >> Hspice Z-state https://designers-guide.org/forum/YaBB.pl?num=1291639005 Message started by haykp on Dec 6th, 2010, 4:36am |
Title: Hspice Z-state Post by haykp on Dec 6th, 2010, 4:36am How I can calculate from Z to high state going time by hspice? The issues is that I am designing retention time, and I need to calculate by simulation the wake-up time of the schema. So while on hut down the wire is in Z state, but when it comes to wake-up the wire value is Vdd, so the question is how to calculate the Z-to-1 time by simulation. |
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