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https://designers-guide.org/forum/YaBB.pl Design >> Analog Design >> Auto zero comparator and process variation https://designers-guide.org/forum/YaBB.pl?num=1292352553 Message started by kanu on Dec 14th, 2010, 10:49am |
Title: Auto zero comparator and process variation Post by kanu on Dec 14th, 2010, 10:49am Hi All, We have designed an auto zero comparator for our project. I understand that the main purpose of auto zero comparator is to cancel small offset voltage. We are concerned about process variation too in our project. So I have a question regarding that. Is an auto zero comparator process variation sensitive ? Regards, Kanu |
Title: Re: Auto zero comparator and process variation Post by AnalogDE on Dec 14th, 2010, 11:08am If designed properly you can make the design process insensitive. |
Title: Re: Auto zero comparator and process variation Post by kanu on Dec 14th, 2010, 12:14pm Hi AnalogDE, Thanks for your reply. I wanted to confirm one more thing. It becomes insensitive to process variation...as the voltage on the capacitor is the voltage difference obtained due to process variation and is fed back from the output during cancellation phase ? Is this what you mean by a careful design.. ie, to sense the voltage at capacitor ? Thanks, Kanu |
Title: Re: Auto zero comparator and process variation Post by Alexandar on Dec 14th, 2010, 11:55pm AnalogDE wrote on Dec 14th, 2010, 11:08am:
Are you sure? Leakage is PVT dependent, and so is charge injection and clk feedthrough. |
Title: Re: Auto zero comparator and process variation Post by AnalogDE on Dec 15th, 2010, 10:17am You cannot completely remove process sensitivity, but you can make those error sources "small enough" with proper design. |
Title: Re: Auto zero comparator and process variation Post by kanu on Dec 16th, 2010, 8:12am I have one more question. To make the offset very small what parameters do I need to consider ? Do I need to make the open loop gain high ? Thanks, Kanu |
Title: Re: Auto zero comparator and process variation Post by AnalogDE on Dec 16th, 2010, 11:40am If you are cancelling at the input (input offset sampling or IOS scheme) then you need high enough gain so you are not affected by gain error. You also need closed loop stability. If you are cancelling at the output (output offset sampling or OOS scheme) you'll need a low gain amp so when it's sampling its offset it doesn't rail out. The amp operates in open loop during sampling, so no worries about closed loop stability. Look up Razavi's book "Principles of Data Conversion System Design" for a good introductory discussion of the above schemes. |
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