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Design >> Analog Design >> does NPN bjt integratable with EEPROM process?
https://designers-guide.org/forum/YaBB.pl?num=1294834126

Message started by nus_lin on Jan 12^th, 2011, 4:08am

Title: does NPN bjt integratable with EEPROM process?
Post by nus_lin on Jan 12^th, 2011, 4:08am

hi guys, the beta value for PNP lateral bjt is 3 for typical. if i want to make very accurate bandgap reference, this is far too small.

vertical NPN bjt made out of N+ bury layer is much better, and is better for BGR.

An accurate BGR needs to trim very accurately, so i need EEPROM option to store the trim bits.

however, for MPW runs available (SMIC, for instance), the process options providing NPN bjt and EEPROM are different, for instance, smic18mix and smic18ee.

my question is, is it possible to do so using another process or modify the current mixed signal process?

Title: Re: does NPN bjt integratable with EEPROM process?
Post by nus_lin on Jan 13^th, 2011, 11:17pm

ok, i figured out a way to make nice circuit without NPN bjt.