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Simulators >> Circuit Simulators >> load impedance with sp analysis
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Message started by vp1953 on Feb 2^nd, 2011, 10:29am

Title: load impedance with sp analysis
Post by vp1953 on Feb 2^nd, 2011, 10:29am

I was wondering why using sp analysis (Cadence spectreRF), the simulated small signal load impedance changes with the port impedance. Since the load is the same, the simulated impedance should be the same regardless of what the port impedance is.

Title: Re: load impedance with sp analysis
Post by rfidea on Feb 3^rd, 2011, 12:42am

I tested this in Analog Artist, IC6.1. When I tried to plot S11 I only managed to plot different versions of S11 (mag, phase, dB, real, Smith ...). I do not think you can plot the input impedance of the DUT directly from the sp analysis. I guess my question is how have you plotted the impedance?

Of course you can do some math of the S11 data to get that, but in that case it seems easier to do an AC analysis and measure input voltage and current and take it from there.

Title: Re: load impedance with sp analysis
Post by vp1953 on Feb 3^rd, 2011, 10:36am

Hi RFIDEA,

The S11 will obviously change with port impedance(Z0)since |S11|=|Zl-Z0/Zl+Z0|

But the load impedance itself should not change - when you plot after SP analysis in Cadence Spectre, choose ZP (in the plot options)and this should give the impedance.

Title: Re: load impedance with sp analysis
Post by vp1953 on Feb 3^rd, 2011, 2:22pm

Hi Pancho,

Thanks for pointing it out. My simulation has only one port (there is no Z12 term) so ZP should give the input impedance. Do you agree?

Title: Re: load impedance with sp analysis
Post by rfidea on Feb 4^th, 2011, 12:03am

Hi vp!

Thanks for the tips of zp and zm. I tried it out this morning and get it to work. Even if I change the port impedance I get the same load impedance if I select ZP and the plot the real and imaginary part. I'm using a very new ADE version, 6.1.5. Do you using an old version which has a bug in it?

I agree with your statement that ZP=ZM if you only have one port. Even if you have two ports but good isolation between them the results should be the same. See Wikipidia definition of z-parameters

http://en.wikipedia.org/wiki/Impedance_parameters

Title: Re: load impedance with sp analysis
Post by vp1953 on Feb 4^th, 2011, 2:04pm

Hi Rfidea,

Thanks for your analysis. I think i know what the problem is - the impedance really depends on the circuit that you are looking at. In my case, I was looking at a schottky diode based charge pump. Changing the port impedance changes the amplitude of the RF signal at the chip front-end and since the front-end is highly nonlinear, it shows a different impedance.

Title: Re: load impedance with sp analysis
Post by rfidea on Feb 5^th, 2011, 1:00am

Hi vp!

A non-linear input should give you this behavoural, for sure. But that was maybe not obvious from the beginning...

Title: Re: load impedance with sp analysis
Post by rfidea on Feb 5^th, 2011, 1:32am

Yeah, I agree. Even if the non-linear effect is there it should only change the large-signal behavoural. Since SP is a small-signal analysis we should not see the effect there. You are right.

I was thinking of one other explaination. VP has an input with a charge pump structure. If there is a feedback at the input defining the input impedance and the port impedance is part of the feedback network, we should get this effect.

Title: Re: load impedance with sp analysis
Post by vp1953 on Feb 5^th, 2011, 8:44am

HI Pancho,

Quote:

Unless Port change DC operation point, port impedance never affects input impedance measurement even if port impedance is part of the feedback network.

The circuit is essentially a rectifier circuit (a voltage hextupler) with no dc voltages present other than the ones that are rectified from the incoming RF signal. The steady state DC values at different points of the circuit are very dependent on the incoming RF signal

Title: Re: load impedance with sp analysis
Post by vp1953 on Feb 6^th, 2011, 10:45am

Hi Pancho,

I just checked again and the measured load impedance does change with the port impedance.

I used a capacitor coupled diode connected nmos as my test circuit (in general some sort of a rectifying circuit is needed to see this effect). First i measure the input impedance usig 50 ohm source and the measured impedance is 8-j500.

Then i use port impedances of 8 ohms and 8+j500 to measure the impedance of the test circuit and the load impedance changes each time. Not surprising as there is almost a 40x increase in the amplitude of the voltage at the test circuit between the two port impedances so some change in impedance is to be expected.