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https://designers-guide.org/forum/YaBB.pl Simulators >> Circuit Simulators >> Sigma Delta ADC simulation (SNR) https://designers-guide.org/forum/YaBB.pl?num=1297091945 Message started by kapileshwar on Feb 7th, 2011, 7:19am |
Title: Sigma Delta ADC simulation (SNR) Post by kapileshwar on Feb 7th, 2011, 7:19am hi every1 , regarding the simulation of Sigma Delta ADC according to my understanding...frm few posts.. suppose if i'm using a clk freq=12800 Khz(.78125 usec) OSR= 64 how can it be OSR 64 ADC????? No.of sample = 64*OSR= 64*64= 4096(recommended in book by Understanding DS Data converter) I should go for an input frequncy of (clk freq)*7/4096 = 21.875 (considering an odd integer multiple) is it so..... then i strt calculating my SNR by using FFT using FFT bins... is my understanding correct ????????????? if not then how to proceed... how to choose the time segment for strobing??? how to come to conclusion to find FFT of particular BIN segment???? Please Do help me, with regards, mnk |
Title: Re: Sigma Delta ADC simulation (SNR) Post by sheldon on Feb 7th, 2011, 5:48pm Kapileshwar, Your questions are not design related. They relate how to setup a simulation so you should have continued with the previous append. If you had tried the setup recommendations, you would get plots something like this. Best Regards, Sheldon |
Title: Re: Sigma Delta ADC simulation (SNR) Post by kapileshwar on Feb 8th, 2011, 2:35am HEY, THANK YOU SO MUCH FOR UR REPLY I WILL TRY .... :) |
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