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Design >> Analog Design >> funtionality of this ckt
https://designers-guide.org/forum/YaBB.pl?num=1299523208

Message started by ontheverge on Mar 7^th, 2011, 10:40am

Title: funtionality of this ckt
Post by ontheverge on Mar 7^th, 2011, 10:40am

Hi,

I came across these two ckts several times, just wanna lay out my understanding and see if I'm correct or not.

for ckt (a) my guess is it's to maintain the output when S1 was ON (instead of floating), and immune the output from noise and spikes, similarly for (b) if swiches are added in similar fashion

any suggestions are appreciated, thanks!

Steve

Title: Re: funtionality of this ckt
Post by wave on Mar 7^th, 2011, 11:11am

Steve - Read up on Latches and Flip Flops.
In b), consider the feedback inverter weaker than the fwd path.

~Wave 8-)

Title: Re: funtionality of this ckt
Post by ontheverge on Mar 7^th, 2011, 11:29am

wave wrote on Mar 7^th, 2011, 11:11am:

Steve - Read up on Latches and Flip Flops.
In b), consider the feedback inverter weaker than the fwd path.

~Wave 8-)

Hi Wave,
u r right, (a) is d latch, by defintion it outputs signal when clk comes (here switch S1) and maintain the signal otherwise, so is what i said correct or I'm still missing the point, please clarify. and btw, what's the difference between this d latch and the more general one that uses two NAND (or XOR) ?

for (b) can you elaborate? i'm a little bit slow

thanks,
Steve