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Design >> Analog Design >> Circuit to measure comparator delay
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Message started by lunren on Mar 30^th, 2011, 6:43pm

Title: Circuit to measure comparator delay
Post by lunren on Mar 30^th, 2011, 6:43pm

Hi Guys,

I want to build a circuit on chip to measure the delay of the comparator used in a single-slope ADC so that I can compensate the error due to the delay in digital domain. Basically it is a counter which can be stopped when the output of the comparator switches. But how to generate a start signal for the counter when inputs of the comparator are equal?

Thanks,

Title: Re: Circuit to measure comparator delay
Post by thechopper on Apr 4^th, 2011, 12:46pm

Hi lunren,

Typically comparators have a predriver stage, which is NOT the one introducing the largest delay in the circuit. You could use a pre-driver stage in parallel with the main one that switches a fast signal to trigger your counter, or eventually use the same pre-driver you use in your main com, for example looking at the pre-driver's stage output and using that signal to also trigger you counter.
Obviously how easy is to implement this will highly depend on the topology or your comparator.
Whatever you use will have to be much faster than the delay you want to measure.

Best
Tosei

Title: Re: Circuit to measure comparator delay
Post by loose-electron on Apr 8^th, 2011, 2:02pm

Start thinking about looking at the concept of matched and balanced paths.

After that, look at circuits that are not measuring the absolute value of delay, but the difference in delay between two matched paths and systems, where the only difference between the two paths is the part that you want to measure.