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Design >> Analog Design >> about the sample instant need your help
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Message started by lhlbluesky_lhl on Apr 8^th, 2011, 4:08am

Title: about the sample instant need your help
Post by lhlbluesky_lhl on Apr 8^th, 2011, 4:08am

in switched capacitor circuits (such as sample-hold circuit), the input signal is sampled at the falling edge of the sampling clock, i want to know, what is the exact sample instant in the following sampling clock? A, B, C or D? in real case, the voltage at the four nodes may be very different (the difference of output voltage can be 2mV or so, especially for small input signal), so, what is the exact sample instant, and when should i sample the input signal at the falling edge of the sampling clock?

please help me, i'm confused about this, thanks all.

Title: Re: about the sample instant need your help
Post by loose-electron on Apr 8^th, 2011, 1:57pm

Depends on your switching circuit in your sampler.

Signal dependence on the actual switch point is an issue in many designs. A distinct on/off is not there when you look carefully at what is going on.

Title: Re: about the sample instant need your help
Post by lhlbluesky_lhl on Apr 9^th, 2011, 5:48am

i use cmos switch here, and any other ideas?

Title: Re: about the sample instant need your help
Post by raja.cedt on Apr 9^th, 2011, 8:36am

hi,
use transmission gates.
Thanks.

Title: Re: about the sample instant need your help
Post by nrk1 on Apr 9^th, 2011, 10:50pm

Of the 4 points marked, it is closer to 0.5*(VH-VL). If you have an nMOS transistor with both its drain and source at a voltage Vx, the switch turns off when the gate falls below Vx+VT. (As others pointed out, this is not instantaneous and there will be some averaging over a certain aperture, but works for a first order).

To make the sampling instant independent of the input signal, use bottom plate sampling for example. Here the sampling instant is determined by a switch whose ends are at a given bias voltage with no signal component.

A search for "bottom plate sampling" on the web will give you the topologies.

BTW, the spectrum of the sampled signal will be sensitive to the sampling phase as long as the sampling is periodic, although the samples themselves are different depending on the phase of sampling.

Nagendra

Title: Re: about the sample instant need your help
Post by loose-electron on Apr 10^th, 2011, 8:37pm

Agree with the prior two posters - transmission gates with both PMOS NMOS switches will help with dynamic range. The technique of bottom plate sampling creates a drive voltage for the gates that is dependent on the signal input. This makes for a switching point in time that is not as dependent on the input signal.

A lot of this is in published papers - go do some research.