The Designer's Guide Community Forum

The Designer's Guide Community Forum
https://designers-guide.org/forum/YaBB.pl
Design >> Analog Design >> offset cancellation
https://designers-guide.org/forum/YaBB.pl?num=1303638625

Message started by Rakesh on Apr 24^th, 2011, 2:50am

Title: offset cancellation
Post by Rakesh on Apr 24^th, 2011, 2:50am

Hi all,
I have a clocked comparator with positive feedback. I need to cancel offset in that comparator . My offset should be less than 0.3mV. Please suggest me some way.
Since my comparator is highly non linear, how to do auto zeroing as feedback operatiionis linear

Title: Re: offset cancellation
Post by nrk1 on Apr 25^th, 2011, 10:47pm

Use a preamp with enough gain to attenuate the comparator offset sufficiently.

Comparator offset sigma ~ sqrt(sigma_VT^2 of all transistors "participating" in amplifying the input)
(very crude estimate)

Use offset cancellation in the linear preamp.

Take care of dynamic offset by layout symmetry, less common mode voltage swing etc.

Title: Re: offset cancellation
Post by Rakesh on Apr 27^th, 2011, 5:53pm

Agreed with you. But the problem with having preamp is the power consumption. So only was wondering is it possible to have some offset cancellation technique in comparator only

Title: Re: offset cancellation
Post by loose-electron on Apr 29^th, 2011, 6:06pm

open a book on the subject - the architecture needed here is in many many books.

page 473 Razavi (chapter 13 on mismatch, Design of Analog CMOS) or the cover of the Johns-Martin textbook shows the architecture.

Title: Re: offset cancellation
Post by Rakesh on Apr 30^th, 2011, 3:11pm

Thanks Jerry,
The references deal with canceling offset for a comparator which has a constant gain or the system isLTI system.
If u have a comparator with positive feedback and transistors operating in every region we cannot use negative feedback to detect the offset.
So the question is how to go about solving offset in these comparators.
One such example of a comparator is clocked sense amplifier used in SRAM.
Thanks
Rakesh

Title: Re: offset cancellation
Post by raja.cedt on May 1^st, 2011, 10:16am

hi,
you can use open loop calibration just by injecting some current to make unbalanced legs to balance.

Thanks.

Title: Re: offset cancellation
Post by Rakesh on May 1^st, 2011, 1:08pm

Hi,
True, If i need the offset to be less than 500uV, designing the switching of current sources and the open loop calibration with low power is rather difficult
Thanks
Rakesh

Title: Re: offset cancellation
Post by sheldon on May 2^nd, 2011, 5:01am

Rakesh,

Look on pages 21~23 of this presentation

http://www.ssc.pe.titech.ac.jp/publications/2008/matsu/Digital%20assist_081025.pdf

for and approach for offset cancellation. They reference a paper
in the Journal of Solid-State Circuits so you can probably find more
details.

Best Regards,

Sheldon

Title: Re: offset cancellation
Post by solidstate on May 2^nd, 2011, 5:38am

Hi,

Maybe you can apply a known ramp to the comparator and measure the time it takes for the comparator to toggle? Or two ramps, if the offset is decision-dependent.

Probably not fast enough to do for every sample, but maybe useful to tune a feedforward compensation?

Title: Re: offset cancellation
Post by Rakesh on May 2^nd, 2011, 8:20am

Thanks sheldon,
The ppt are really good.
Thanks
Rakesh

Title: Re: offset cancellation
Post by loose-electron on May 2^nd, 2011, 1:07pm

sounds like you want a static system. That said, the prior suggestions of injecting offset are possibilities.

I have also seen changing the geometry (switching pieces in and out) of the loads above the differential pairs, and other size changes (using switches again) of various pieces.

You got to run an alignment circuit every once in a while.