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Design >> RF Design >> a question from Tom Lee's RF CMOS book
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Message started by snaildr on May 6^th, 2011, 11:26pm

Title: a question from Tom Lee's RF CMOS book
Post by snaildr on May 6^th, 2011, 11:26pm

Hi, this is my first post here. I'm a grad student working in integrated optics and I'm pretty new to circuit designs. Hope someone can answer my questions since in my research group there are not a lot of people around that I can ask circuit questions :)

I'm reading Thomas Lee's book The Design of CMOS Radio-Frequency Integrated Circuits (2nd ed). The question I have is about the biasing in Fig 12.11 page 389. Sorry that I cannot post the copyrighted content here, but if you don't have that book you can go here http://books.google.com/books?id=io1hL48OqBsC&printsec=frontcover&dq=the+design+of+cmos+radio+frequency+integrated+circuits&hl=en&ei=deHETeTqMoTUtQOnybSmAQ&sa=X&oi=book_result&ct=result&resnum=1&ved=0CDYQ6AEwAA#v=onepage&q=LNA&f=false , and browse down a little bit, try to find page 389.

We do have to bias the gate of M1 and M2, right? then M5 and M6 will be turned on and the voltage on the top of R3 can't equal to Vg1,2 anymore. Another question is that I don't quite understand how to use R5.

I might be asking the obvious, but please feel free to point me to another reference that can help answer my question. Thanks!

Title: Re: a question from Tom Lee's RF CMOS book
Post by RFICDUDE on May 7^th, 2011, 6:33am

This particular circuit can be confusing to look at because it is really two amplifiers stacked on top of each other. Amplifier stacking is done to reduce power consumption because the two amplifiers use the same supply current. Otherwise, cascading the two amplifiers would double the current consumption of this circuit. But the downside is that the available voltage swings for the amplifiers are reduced, and the bias circuit is a bit tricky (and makes for a difficult to understand schematic).

Anyway ... to answer your question.
The PMOS devices M5 and M7 are not used as active transistors. Instead they are being used as high value resistors to provide DC bias voltage to the gates of M1 and M2 from the voltage established between R5 and R3.

The resistor stack of R5, R3 and R4 is simply a resistor divider that divides up the voltage drop from the sources of M7 & M8 to the sources of M1 & M2. I could try to go into explaining the bias circuit, but it would be a rather lengthy post.

Title: Re: a question from Tom Lee's RF CMOS book
Post by snaildr on May 7^th, 2011, 7:42pm

Thanks a lot for your reply!! It pretty much explained everything I was confused about.