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Design Languages >> Verilog-AMS >> regulator model convergence problem
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Message started by ywguo on Jun 19^th, 2011, 12:06am

Title: regulator model convergence problem
Post by ywguo on Jun 19^th, 2011, 12:06am

Hi Guys,

I tried to simulate an 8MHz crystal oscillator with the current limiting voltage regulator. That regulator is one of Ken's Verilog-AMS model.

http://www.designers-guide.org/VerilogAMS/functional-blocks/regulator/regulator.va

The average current consumption of my 8MHz crystal oscillator is more than 40 μA. Its peak current is near 80 μA. It runs off the regulator output. When I set vmax = 1.9V, and imax = 1mA, the simulation looks good. Then I want to check what happens if the current is limited by the regulator. I set imax = 60 μA and vmax = 1.9V. The simulator failed to converge in transient analysis.

I tried to set timeTol and exprTol in the cross function. For example,
@(cross((v-vmax)/vmax - (i-imax)/imax, 0, 1e-6, 1e-3))
;
But it failed. How do I make an estimation about the tolerances for this simulation?

The output log file is attached.

Any comments are appreciated.

Yawei

Title: Re: regulator model convergence problem
Post by ywguo on Jun 19^th, 2011, 12:20am

The following is the waveform of avdd current, voltage, and clock output of the crystal oscillator. It is weird that avdd current has a big spike, a few hundred ampere, before the convergence failure.

Yawei