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Simulators >> RF Simulators >> Simulate Noise on CTIA
https://designers-guide.org/forum/YaBB.pl?num=1311102324

Message started by BenMartin on Jul 19^th, 2011, 12:05pm

Title: Simulate Noise on CTIA
Post by BenMartin on Jul 19^th, 2011, 12:05pm

I am trying to simulate a Capacitive Transimpedance Amplifier (CTIA), being used to integrate a photodiode current. Basically, a CTIA is just an op-amp with a capacitor in feedback to integrate (and a reset switch, which shorts this capacitor to clear the integration). The reset is periodic.

Can a PNOISE simulation be used in this circuit to test the CTIA 1/f noise, and more importantly, to simulate the effect of a CDS downstream at removing 1/f noise? I have read the paper on simulating SC circuits using PNOISE and PAC.

So far, I have been unsuccessful at getting a output PSD that shows the effect of the CDS (suppression of 1/f noise in low frequencies). I am starting to question my methods.

It could also be the circuit, I suppose, but I tried solving the gain from the op-amp inputs (where input-referred noise would appear) to the output, using a PAC analysis, and it correctly shows almost complete suppression of low frequency, so I don't understand why PNOISE would tell me that that op-amps's input transistor is still contributing the majority of noise (as 1/f), and why that 1/f noise has a classic 1/f shape despite CDS. It should have a zero at DC, I would expect.

Thanks,
Ben

Title: Re: Simulate Noise on CTIA
Post by Ken Kundert on Jul 20^th, 2011, 12:24am

Yes, PNoise is ideal for simulating such circuits. However, many people get confused by the the various options available. Perhaps you should describe your set-up.

-Ken