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Design >> RF Design >> CMRR definition conflict? (Voltage Gains or S parameters)
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Message started by mix on Aug 18^th, 2011, 7:27pm

Title: CMRR definition conflict? (Voltage Gains or S parameters)
Post by mix on Aug 18^th, 2011, 7:27pm

Hello,

I am currently experimenting with a DtoSE (differential to single ended) converter, and I would like to characterize its balance using the CMRR (Common mode rejection ratio) figure of merrit.

I would like to hear your opinion on the difference (is there one actually?) between the definitions of the CMRR (Common mode rejection ratio) in the analog and the RF worlds.

To be more specific, the classic analog definition of CMRR is |Adm/Acm|, where Adm is the differential voltage gain and Acm is the common mode one. Let's name S (single ended) the output port, P the positive input and N the negative one.

DtoSE pinout
P-----| |
| |--S
N-----| |

If we simulate/calculate the single ended gains Asp (drive P port with N port ac shorted) and Asn, I believe we can use the following relations to find Adm, Acm and thus CMRR.
Adm=(Asp-Asn)/2
Acm=Asp+Asn
CMRR=|(Asp-Asn)/[2(Asp+Asn)]|

On the other hand, the definition of CMRR based on S-parameters is:
(see e.g. MTT paper Combined Differential and Common-Mode
Analysis of Power Splitters and Combiners)

CMRR=|Ssd/Ssc|=|(Ssp-Ssn)/(Ssp+Ssn)|

and that's because Ssd=(1/sqrt(2)) * (Ssp-Ssn) and Ssc=(1/sqrt(2)) * (Ssp+Ssn).
where the symbols mean:
Ssd: mixed mode S param, gain from diff input port to S output
Ssc: mixed mode S param, gain from comm input port to S output
Ssp: single ended S param, gain from P input to S output
Ssn: single ended S param, gain from N input to S output

So, the same circuit, shows 6dB higher CMRR when it is S-parameters simulated with respect to an AC analysis.

Which is the correct one ?

Similar differences of 6dB between Sparam and Voltage gains can often rise due to improper port matching, and this is well understood. However, I believe this is not the case with the DtoSE.

It is worth noting that the amplitude imbalance i derive via simulation is the same in both domains i.e.
|Asp/Asn| = |Ssp/Ssn|
which further confuses me, and shows that the CMRR differences are probably due to different definitions. Is any of them "more correct" ?

So, my feeling is that you have to explicitly state which CMRR definition you are using CMRRanalog or CMRRrf. Do you agree with this?

Thank you for your time,
Looking forward to your replies.
mix

Title: Re: CMRR definition conflict? (Voltage Gains or S parameters)
Post by harpoon on Aug 19^th, 2011, 6:53am

I don't have access to the MTT paper, but I think CMRR is more commonly defined for amplifier design. It is one of the first thing you learn when dealing with op-amps.

The RF definition however may not be as widely used (or called something other than CMRR).

In any case, it is just a "metric" ... you'll probably be better off using the MTT definition as long as you are clear what you mean.

just my thoughts ...

Title: Re: CMRR definition conflict? (Voltage Gains or S parameters)
Post by mix on Aug 19^th, 2011, 1:41pm

Thank you for replying harpoon. Actually, the DtoSE converter I am talking about, is a simple amplifier with a diff input and single ended output. I do tend to adopt this "metric view" too, though I really welcome more feedback.

Title: Re: CMRR definition conflict? (Voltage Gains or S parameters)
Post by loose-electron on Aug 26^th, 2011, 10:21am

There are a number of tests and conditionals out there which have multiple definitions for performing the test. Its not a big deal as long as the performance criteria is explicitly defined in the process of running and presenting the test.