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Simulators >> RF Simulators >> Questions on simulating switched-capacitor.
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Message started by weigiho on Aug 29^th, 2011, 11:27am

Title: Questions on simulating switched-capacitor.
Post by weigiho on Aug 29^th, 2011, 11:27am

I try to simulate a switched-capacitor to find its equivalent resistance. The cap=1pF and the clock rate is 2GHz (rise=fall=1 psec), with non-overlapping phi_1 and phi_2. I run a PSS/PAC analysis with PAC magnitude=1 and then I measure the current flowing into the switch for side-band=0 (input=10KHz-10MHz). The theoretical resistance should be 1/fC=1/(2G*1pF)=500ohm, and hence the current at sideband-0 should be 2mA. However, I found

if PSS-number of harmonics=PAC-maximum sideband=10, the current is 1.13671mA.

if PSS-number of harmonics=PAC-maximum sideband=50, the current is 2.0625mA.

if PSS-number of harmonics=PAC-maximum sideband=100, the current is 2.035714mA.

However, if PSS-number of harmonics=PAC-maximum sideband=0 and PSS-time step parameters-maxstep=20fsec, the current is 2.0000mA.

I read the paper "Efficient AC and Noise Analysis of Two-Tone RF Circuits" section-2A, and have the following questions:

(1)Did this paper section-2A give the basic theory behind the PSS/PAC engine?

(2)If yes, why increasing the PAC-maximum sideband helps? it looks to me that what is needed is an accurate Vs(t) (in the paper), number of sidebands should not matter. Also, how can I set the hj=tj-tj-1 in the paper in the PSS/PAC engine?

(3)What does the "PSS-time step parameters-maxstep" do? Why set it to a small number helps? Is it when we set it to be small, we can get a more accurate matrix in eq(8) of the paper? And what is the general rule of setting it?

(4)Can you suggest some readings about methods of how to get the matrix in eq(8) in the PSS/PAC engine accurately?

Thanks very much!

Title: Re: Questions on simulating switched-capacitor.
Post by Ken Kundert on Aug 30^th, 2011, 12:52am

1) yes
2) because increasing the sidebands indirectly causes the time step size to be reduced (SpectreRF automatically reduces the timestep when you ask for more sidebands, it it did not then the values computed for those sidebands would not be accurate).
3) maxstep sets the maximum time step size (run 'spectre -h pss' for information about pss parameters). Using a small maxstep improves the accuracy of the finite-difference approximation to the derivative.
4) you might try reading Simulating switched-capacitor filters with SpectreRF (http://www.designers-guide.org/Analysis/sc-filters.pdf).

Title: Re: Questions on simulating switched-capacitor.
Post by weigiho on Nov 8^th, 2011, 3:20pm

I read the paper "Efficient AC and Noise Analysis of Two-Tone RF Circuits". I have some question on the eq(7)

The circuit I tried analyze is a simple switch and capacitor network, as shown in the attachment. The transistor is modeled to be a switch, which has a conductance=Gon*uL(t), where uL(t)=101010 ... is an ideal switching function with freq fLO. The nodal eqs I have are

{Gon*uL(t)+Gs}*v1(t)-Gon*uL(t)*v2(t) =-Vs(t)
-Gon*uL(t) *v2(t)+Gon*uL(t)*v2(t)+d/dt(Cv2(t))=0

(1)The paper first solve vL(t), which is the solution for Vs(t)=0. In this case, can I say that vL(t)=[0,0]'?

(2)How can we calculate the term dq(vL(t))/dvL and di(vL(t))/dvL? For example, di(vL(t))/dvL means when vL(t) changes, how the "current function" i(.) changes. In this example, is the i(.)=a 2X2 matrix

{Gon*uL(t)+Gs} -Gon*uL(t)
-Gon*uL(t) +Gon*uL(t)
?

(3)If yes, how di(vL(t))/dvL can be calculated. Looks to me that di(vL(t))/dvL will assume some non-zero value only around the clock transition. How can we calculate that?