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Design >> Analog Design >> Differential Pair Design
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Message started by Dididito on Sep 5^th, 2011, 2:10am

Title: Differential Pair Design
Post by Dididito on Sep 5^th, 2011, 2:10am

Hello everybody,

This is my first post in the forum. I hope I can learn as much as possible from all of you, and help you when you need it.

I'm starting right now on IC design, I would like to desing a Two Stages OpAmp. With a differential pair in the first stage.

The differential pair I'm using as reference has two PMOS as input and two NMOS as active load. I'm using AMS 0.35um technology.

My problem is that the output of the differential pair is saturated, and I really don't know how to solve it. Any idea or advice??

Thank you very much in advance.

Title: Re: Differential Pair Design
Post by raja.cedt on Sep 5^th, 2011, 3:13am

always post schematic, please never operate high gain amplifiers in open loop, it will get saturated.

Thanks.

Title: Re: Differential Pair Design
Post by Dididito on Sep 5^th, 2011, 3:31am

Sorry. Here you can see the shematic. I didn't know that in open loop it get saturated. In the next post I show the schematic used to simulated it.

Title: Re: Differential Pair Design
Post by Dididito on Sep 5^th, 2011, 3:32am

The schematic to simulated it.

Title: Re: Differential Pair Design
Post by raja.cedt on Sep 5^th, 2011, 3:40am

hello,
By doing operating point simulations, have you convinced that every transister biased in proper region? If so there is no mistake with the circuit. May be it's having high gain and thats why it is getting saturating. Do one thing, connect in unity gain configeration and ramp the input and see wether it is tracking or not at the o/p.

Thanks.

Title: Re: Differential Pair Design
Post by Dididito on Sep 5^th, 2011, 5:23am

The problem was in the input signals. I used too high voltage and I forgot to add an offset voltage.

I'm using VDD=3.3 and VSS=0 and I was using 500mV signals with 0 offset.

Not it seams that it doesn't saturated.

My questions now are:

1) I want to use a common-source stage after this one, should I correct offset in the pair, in the common-source, or in both of then??
2) How can I get a accuracy control of the gain in the differential pair?

Title: Re: Differential Pair Design
Post by raja.cedt on Sep 5^th, 2011, 8:01am

hello,
it is very difficult to control gain, you wil get some which is strongly depends on the process, at the end of the day you need to put your opamp in -ve feedback, so probably you might have some gain spe based on steady state error. So first fully simulate this block and see how much gain you have, and then try to design 2nd stage with common Source. You can check razavi for bias control (make sure that 2nd stage bias current equal to half of the tail current in the first stage)

I feel his is more than enough for normal two stage opamp.

THnaks.

Title: Re: Differential Pair Design
Post by AnalogDE on Sep 5^th, 2011, 8:02am

Your diff-pair appears to be imbalanced. Just look at the DC operating point and apply your common mode voltage to both inputs of the diff pair.
Don't apply any offset voltage and check that all your transistors are in saturation region of operation.

After that, you can add your second stage common source -- read up on two stage amps, there is a way to size the second stage to minimize the systematic offset between the two.

Also, you don't get very good control of the gain until you start adding negative feedback.

Title: Re: Differential Pair Design
Post by SoliS on Sep 19^th, 2011, 9:57am

Take a look at Chapter 5 of "Analog Integrated Circuit Design" by Johns and Martin. There is a section in there on designing the 2-stage opamp to have a low systematic offset. A good place for you to start. You might be able to find some of it on Google Books if you don't have a copy of the book yourself.