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Simulators >> Circuit Simulators >> To change a variable in test bench and pass it to design program
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Message started by sindhura on Sep 13^th, 2011, 1:28pm

Title: To change a variable in test bench and pass it to design program
Post by sindhura on Sep 13^th, 2011, 1:28pm

Hi,
Can anyone help me with my problem.
I am trying to change a parameter in my testbench and pass it to my design module. Basically I am working on processes variations on a device.
I am passing the parameter by using assign statement in my main module. I am trying to compile my program as many times as I change the parameter. But when I try to do change my parameter in always block, my parameter changes parallel with the input voltage. So, I am able to compile it only once. Can someone help me with this?
Thank you,
Sindhura

Title: Re: To change a variable in test bench and pass it to design program
Post by boe on Sep 15^th, 2011, 8:37am

Hi Sindhura,
If you offer more information, you are more likely to get help, e.g.:
Which simulator (and version) do you use, Code/netlist (fragment), ...

B O E

Title: Re: To change a variable in test bench and pass it to design program
Post by sindhura on Sep 15^th, 2011, 2:44pm

I am using Cadence sim vision 08.20-s014.
I am using verilog AMS for programming.

my test bench is as follows:

module testbench();
electrical gnd,in;
ground gnd;
real index;

real length1;

m_linear # (.mu(1e-10)) m1(in,gnd);

initial length1 = 50e-9;
always
begin
#(2)
length1 = length1 + 50e-9;
end
// Create a pulse voltage source as input to the design
vsource #(.type("pulse"), .val0(1),.val1(-1), .period(20m)) v0(in,gnd);

endmodule

and in the design module I am implementing

module m_linear(Vp, Vn);
input Vp;
output Vn;
electrical Vp, Vn;

wreal length;// = 50e-9 from (-inf:inf); //

real Vm; // Terminal voltage
real Im; // Current

parameter real deltaT=1u;//for example.
integer fptr;

assign length = testbench.length1;
analog begin

Vm = V(Vp, Vn);

// Calculate the current
Im=Vm/length;

I(Vp, Vn) <+ Im;

@(initial_step) begin
fptr =$fopen("/home/sxm7139/Desktop/Memristor/test.txt");
end

@(timer(1p,deltaT)) begin
$fstrobe(fptr,"%g %g",length,Im);
end

@(final_step) $fclose(fptr);
end
endmodule

Title: Re: To change a variable in test bench and pass it to design program
Post by sindhura on Sep 15^th, 2011, 2:46pm

In the above program I need to run the design module whenever I change my length, but length and input voltage are varying simultaneously. Can someone please help me with that?

Title: Re: To change a variable in test bench and pass it to design program
Post by boe on Sep 16^th, 2011, 9:06am

Sindhura,
why do you use wreal for length? I'd expect a real for that.

B O E

Title: Re: To change a variable in test bench and pass it to design program
Post by ywguo on Sep 20^th, 2011, 7:20am

sindhura wrote on Sep 15^th, 2011, 2:46pm:

In the above program I need to run the design module whenever I change my length, but length and input voltage are varying simultaneously. Can someone please help me with that?

Can you present the relation of length and input voltage?

Title: Re: To change a variable in test bench and pass it to design program
Post by sindhura on Sep 21^st, 2011, 8:08am

Hi Boe,

If I use real I am getting the following error..
Err: A reg is not a legal lvalue in this context
I am using it in continuous assign statement so it can't be a real.

Regards,
Sindhura

Title: Re: To change a variable in test bench and pass it to design program
Post by sindhura on Sep 21^st, 2011, 8:10am

I am working on the process variations of a device. I am not supposed to put up the actual device characterstics equation. So I modified the relation. What I need is help with the simulation

Thanks
Sindhura

Title: Re: To change a variable in test bench and pass it to design program
Post by boe on Sep 22^nd, 2011, 3:23am

Sindhura,

I expected a real at line
Code:

Im=Vm/length;

but didn't think about the assign statement. Perhaps you should convert the wreal to a real?

B O E

Title: Re: To change a variable in test bench and pass it to design program
Post by boe on Sep 22^nd, 2011, 4:59am

sindhura wrote on Sep 21^st, 2011, 8:10am:

I am working on the process variations of a device.

Process variation changing over time?

Quote:

What I need is help with the simulation

The better we understand your problem, the better the advice we can give you.

B O E

Title: Re: To change a variable in test bench and pass it to design program
Post by Geoffrey_Coram on Sep 23^rd, 2011, 10:48am

I still don't understand what you are trying to do.

Why do you have a pulse source, if you don't want the input voltage and length to be changing at the same time? (Why not a dc source?)

What's the timescale for #(2) -- is it much longer than the 20m period of your pulse source? (I usually work with Verilog-A, so my digital knowledge is limited.)

How does length change in your real design? For the example you showed, one could set length in the analog block
length = (1 + floor($abstime / 2 )) * 50e-9;
(I'm not sure of the units on "2"). Every 2 seconds, length will step up by 50n. I guess you get 100 periods of your 20ms pulse source this way.

Title: Re: To change a variable in test bench and pass it to design program
Post by sindhura on Sep 27^th, 2011, 1:20pm

Hi Geoffrey,

I am sorry for not being able to put my question in a proper way.

Lets take the below testbench

module testbench();
electrical gnd,in;
ground gnd;
real index;

real length1;

m_linear # (.mu(1e-10)) m1(in,gnd);

// Create a pulse voltage source as input to the design
vsource #(.type("pulse"), .val0(1),.val1(-1), .period(20m)) v0(in,gnd);

endmodule

Whenever I run my design it just simulates the design once with the default L value in the main module. But I want to change my L value so that L lies between : L-5% <L < L+5%
Everytime I change I want to run my simulation.

I can instantiate the modules 10 times in my design with different L values like below.

m_linear # (.mu(1e-10), .length(50e-10) m1(in,gnd);
m_linear # (.mu(1e-10), .length(55e-10) m1(in,gnd);
m_linear # (.mu(1e-10), .length(60e-10) m1(in,gnd);
m_linear # (.mu(1e-10), .length(45e-10) m1(in,gnd);
m_linear # (.mu(1e-10), .length(40e-10) m1(in,gnd);

But it gets too complicated for 100+ variations. So I need someone to help me to do these simulations in an effective way.

Regards,
Sindhura

Title: Re: To change a variable in test bench and pass it to design program
Post by Geoffrey_Coram on Sep 28^th, 2011, 1:38pm

Do you want 100+ instances, each with a different L?

Or do you want 1 instance, but to run a simulation that is 100 times some unit duration, and change L after each unit duration?

Or do you want to call your simulator 100+ times to run the simulation?

Title: Re: To change a variable in test bench and pass it to design program
Post by sindhura on Oct 3^rd, 2011, 10:11pm

Hi Everyone,

Thank you for help. I came to know that I can generate random numbers for my parameter Length and run the simulations using perl or phython script.

Regards,
Sindhura