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https://designers-guide.org/forum/YaBB.pl Modeling >> Semiconductor Devices >> accuracy of PSP and BSIM model in the Accumulation mode https://designers-guide.org/forum/YaBB.pl?num=1317091940 Message started by aaron_do on Sep 26th, 2011, 7:52pm |
Title: accuracy of PSP and BSIM model in the Accumulation mode Post by aaron_do on Sep 26th, 2011, 7:52pm Hi, I have a design where one of the transistors is biased with VGS equal to the negative supply voltage (it is an NMOS). I'm wondering whether the transistor model is accurate in this region. I have access to BSIM and PSP models, but they don't agree with each other. My thinking is that the transistor is normally biased with VGS between 0 and VDD, so the modeling accuracy may not be good with VGS << 0. Any input is appreciated, and links to documents would be helpful too. thanks, Aaron |
Title: Re: accuracy of PSP and BSIM model in the Accumulation mode Post by Geoffrey_Coram on Sep 28th, 2011, 1:42pm Probably, your characterization department has trouble making good measurements in such a low-current region, or they may not have even looked at data in that region. I would expect it to be more strongly dependent on the accuracy/effort put into the extraction, rather than the model equations (BSIM4 vs PSP), though one might find that the more physical PSP model naturally gives you a consistent and accurate result for low VGS, whereas BSIM4 would need some further empirical parameter adjustments. |
Title: Re: accuracy of PSP and BSIM model in the Accumulation mode Post by aaron_do on Sep 28th, 2011, 6:14pm Quote:
that sounds right. Thanks. |
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