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Design >> Mixed-Signal Design >> Calculation of sampling cap.
https://designers-guide.org/forum/YaBB.pl?num=1318628707

Message started by medya on Oct 14^th, 2011, 2:45pm

Title: Calculation of sampling cap.
Post by medya on Oct 14^th, 2011, 2:45pm

hi,
I am designing a pipeline ADC and using this formula for calculating sampling cap(for front end S/H):
(LSB)^2/12=KT/c ===> c>=12*2^(2N)*KT/Vfs^2
because of vfs is the differential value then the calculated value for csample=2*c
is that true???
my ? is that when we calculate csample for pipeline ADC we neglect from other stages thermal noise because of their noise attenuated by preceding stages but first mdac noise does not attenuated as the front end S/H gain is 1 in this case must we add its noise to noise of the S/H????
and doubled the csample??
can any one introduce a good references for calculating noise in SC circuits???I search in google but not find any ref that explain it well.
thanks.

Title: Re: Calculation of sampling cap.
Post by carlgrace on Oct 16^th, 2011, 7:48pm

Yes, you need to take the noise in the first mdac into account. The way to do that is to notice the noise of the first stage and the SHA add as sum of squares, so if you size your SHA sampling cap the same as the first stage you will have a 3dB increase of noise.

Look for Boris Murmann's notes for Stanford ee315B. They are excellent.