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Design >> Analog Design >> gm/Id Methodology
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Message started by vinaydreddys on Oct 15^th, 2011, 1:32am

Title: gm/Id Methodology
Post by vinaydreddys on Oct 15^th, 2011, 1:32am

Hi All,

I am a student of VLSI and new to Analog Design.

I have recently come across a methodology called the gm/id methodology which is claimed to be used for short channels.

I am interested to learn this methodology and is looking for guidance in this regard.

Thanks a lot in advance... :)
Vinay

Title: Re: gm/Id Methodology
Post by raja.cedt on Oct 15^th, 2011, 2:31am

hello,
yes you are correct, gm/id methodology is one of the best method to design op amps with lesser iterations. Please have look at this pdf

https://ccnet.stanford.edu/ee214b/

Thanks,
raj.

Title: Re: gm/Id Methodology
Post by Larry_80 on Oct 15^th, 2011, 10:48pm

gm/id methodology is just a way of characterizing your device. So gm/Id is basically an Efficiency measurement for a certain device and can be used as a quick way to obtain various parameters that can be used in design of Op-Amps as mentioned by the poster above. gm/Id in a way can be used as a figure of merit for your device, though this will only take care of parameters like gain etc. Since in Analog design (and Digital), Gain trades with bandwidth, we need to be able to characterize the frequency at which our device will still work as an amplifier and not attenuator, so this requires another type of FOM (figure of Merit) that considers both gm/Id and frequency. Analog design is very interesting and if you really have a passion for it, the sky is the LIMIT.

Title: Re: gm/Id Methodology
Post by Larry_80 on Oct 15^th, 2011, 10:59pm

In addition, you can plot your gm/Id versus Vdsat for your device. You will observe it reaches an optimum values at some Vdsat* value after which the efficiency decreases i.e u are just burning extra current without amplifying any further. So basically, you would like to bias your device around the vdsat* region. In all honesty, you need to study this in detail to be able to appreciate it.

Title: Re: gm/Id Methodology
Post by AnalogDE on Oct 15^th, 2011, 11:04pm

Have any of you checked out the book on gm/id methodology by Paul Jespers? It's available on amazon.... I'm wondering if it's worth picking up.

Title: Re: gm/Id Methodology
Post by RobG on Oct 26^th, 2011, 12:40pm

raja.cedt wrote on Oct 15^th, 2011, 2:31am:

hello,
yes you are correct, gm/id methodology is one of the best method to design op amps with lesser iterations. Please have look at this pdf

https://ccnet.stanford.edu/ee214b/

Thanks,
raj.

Hi Raj
I didn't see any pdf at the link you provided.

Title: Re: gm/Id Methodology
Post by Praveen K on Oct 26^th, 2011, 10:21pm

hi Rob,

download the course reader, from the handout link on left,

here is it,

https://ccnet.stanford.edu/cgi-bin/course.cgi?cc=ee214b&action=handout_menu

k.praveen

Title: Re: gm/Id Methodology
Post by carlgrace on Oct 29^th, 2011, 5:10pm

AnalogDE wrote on Oct 15^th, 2011, 11:04pm:

Have any of you checked out the book on gm/id methodology by Paul Jespers? It's available on amazon.... I'm wondering if it's worth picking up.

I checked out the book from the library when it first came out. I wasn't super impressed. I think Murmann's notes are better.