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Design >> Analog Design >> How to improve phase margine for conventional folded cascode OTA
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Message started by mavericks on Oct 15^th, 2011, 5:08am

Title: How to improve phase margine for conventional folded cascode OTA
Post by mavericks on Oct 15^th, 2011, 5:08am

hello friends
i have designed the folded cascode opamp having gain of 50 dB, UGB~150MHz... but phase margine is very low ~25 degree's only.. so can anybody tell me....
##-> how to improve the PM of folded cascode Opamp (*without adding compensation capacitor) ....??
##->how to make the second pole frequency greater than UGB for folded cascode amplifier(*for stability).....??

Title: Re: How to improve phase margine for conventional folded cascode OTA
Post by raja.cedt on Oct 15^th, 2011, 6:18am

hello,
without adding compensation cap, it is very difficult to compensate unless you are ready to compromise some thing, for example your second pole is at drain of the Q5, so there try to reduce the cap otherwise try to increase the cap. By the way whats the load cap, try to increase that it will be compensated. Whats the CMFB architecture?

Thanks,
raj.

Title: Re: How to improve phase margine for conventional folded cascode OTA
Post by Ashutosh_rane on Oct 15^th, 2011, 6:35am

thank u raja...
i have designed SC cmfb and continuous cmfb too but both are not working properly so finding more material ......rather i will put my problems regarding that in next post...

but now for this post i am using no load
capacitance
till with load capacitance of 1 uf UGB lowered to 30 mhz.
Do the output biasing current(I5) affects the PM?? (*as per "procedure for fullydiff. folded cascode" paper) it says PM gm5=UGB*CL*tan(PM) and gm of output transistor depend upon current and the size....of Q5.

Title: Re: How to improve phase margine for conventional folded cascode OTA
Post by raja.cedt on Oct 15^th, 2011, 6:51am

hello,

1. with 1uf load cap you are getting 30Mhz ugb? is it correct because to get this result you need gm of 4.5 for input pair.

2. But the formula what you are referring is under the assumption of dominate pole at the o/p and non dominate pole at drain of Q5 and in the formula you have keep capacitance of Q5 drain node cap rather than load cap.

3. How you are simulating PM, like in the open loop or closed loop? better use in fb, so that your bias point will be same.

Thanks,
raj.

Title: Re: How to improve phase margine for conventional folded cascode OTA
Post by Ashutosh_rane on Oct 15^th, 2011, 7:38am

hello raja
thanks for your reply...
i have uploaded the circuit ....just for reference.... that is not my circuit... i will upload my circuit and its responce

in my actual circuit i am not getting the gain and bandwidth as it is calculated theoretically...its with huge difference i will give my calculations and screen shots by tomarrow bcoz now i cant access lab....!
i am using 1.8um cmos umc technology...
BSIM3v3 model
simulator spectre...
so can u tell me
why this discrepancy comes with theory and simulated results......??

Title: Re: How to improve phase margine for conventional folded cascode OTA
Post by raja.cedt on Oct 15^th, 2011, 8:25am

hello,
any one can't tell with out schematic and operating point. please post schematic and response.

Thanks,
raj.

Title: Re: How to improve phase margine for conventional folded cascode OTA
Post by rfidea on Oct 15^th, 2011, 9:41am

Are you saying that you have a load of 1uF = 1e-6F and a UGB=30mHz=0.03Hz? Without looking at the schematics and knowing how much current you are using maybe this is correct. Your load of 1uF is very large.

Title: Re: How to improve phase margine for conventional folded cascode OTA
Post by Ashutosh_rane on Oct 15^th, 2011, 10:22am

sorry....its 1pf

Title: Re: How to improve phase margine for conventional folded cascode OTA
Post by rfidea on Oct 15^th, 2011, 12:57pm

Ok, that sounds more resonable. But then you should not get ugb=0.03Hz if everything is ok. It must be something really bad. I would start to look at the DC voltage in every node to see that the opamp is properly biased. I would also check the current level in each branch so that is ok as well.

Title: Re: How to improve phase margine for conventional folded cascode OTA
Post by Larry_80 on Oct 15^th, 2011, 10:40pm

If you don't want to use any compensation capacitor, you can try to trade your UGBW for phase margin if you have the liberty of doing that. If not, i cannot think of any other way to improve your ckt stability.

Title: Re: How to improve phase margine for conventional folded cascode OTA
Post by Ashutosh_rane on Oct 16^th, 2011, 2:39am

hello Larry,
if i dont use compensation capacitor hoe can i make use sacrifice of bandwidth i mean what changes i have to make so that bandwidth will reduce and PM will increase.
Larry_80 wrote on Oct 15^th, 2011, 10:40pm:

Title: Re: How to improve phase margine for conventional folded cascode OTA
Post by Larry_80 on Oct 16^th, 2011, 12:38pm

UGBW= Adc*Wp where Adc is DC gain and Wp is dominant pole
Adc=gm2*Rout
Wp=1/(Rout*CL)
=> UGBW=gm2/CL; so u can see to reduce UGBW you can just reduce the transconductance of your input differential pair.

Title: Re: How to improve phase margine for conventional folded cascode OTA
Post by Ashutosh_rane on Oct 17^th, 2011, 2:03am

i am attaching my circuit please suggest me if any changes.....the
graph 1 is without load capacitance and
graph 2 is with load capacitance (1pf)

Title: Re: How to improve phase margine for conventional folded cascode OTA
Post by Ashutosh_rane on Oct 17^th, 2011, 2:05am

graph 1

Title: Re: How to improve phase margine for conventional folded cascode OTA
Post by Ashutosh_rane on Oct 17^th, 2011, 2:09am

graph 2

Title: Re: How to improve phase margine for conventional folded cascode OTA
Post by raja.cedt on Oct 17^th, 2011, 2:27am

with 1pF cap you have very good Phase margin (i guess this is what you want). Even if you don't want to add any load, i would suggest reduce the input bias current. I thin you are getting zero at lower frequencies, may be it's because of m18.

In folded cascode better bias both legs with same current, in your case it's 4:1 ratio, some time you would end up with slew rate problem

Thanks,
raj.

Title: Re: How to improve phase margine for conventional folded cascode OTA
Post by Ashutosh_rane on Oct 17^th, 2011, 2:32am

raja.cedt wrote on Oct 17^th, 2011, 2:27am:

hi
how that zero comes due to M18....? what to do to move it to higher frequencies...??.

Title: Re: How to improve phase margine for conventional folded cascode OTA
Post by Ashutosh_rane on Oct 17^th, 2011, 2:38am

raja.cedt wrote on Oct 15^th, 2011, 8:25am:

hello,
any one can't tell with out schematic and operating point. please post schematic and response.

Thanks,
raj.

hi raja,
i have uploaded the circuit and its results.....!!
i have doubts such as
1)my theoretical calculated gain is about 8.5k but the result is only 42dB(139)
2) same for the UGB calculated is 2.8GHz and observed is 8 MHz...
why such a discrepancy in result occurs??
only for folded cascode opamp i get like that but for other configurations like CS amplifier, telescopic amplifier i get according to theory...

Title: Re: How to improve phase margine for conventional folded cascode OTA
Post by raja.cedt on Oct 17^th, 2011, 3:04am

hello,
check you calculations, i calculated BW it's 454Mhz under 1st order assumption (interestingly you have a zero so i am not aware of Ugb equation ), how come you got 2.8G (may be you forgot 2*3.14) . i want to calculate your gain but i don't have M17 gm.
There is no special about folded cascode it will match up to decent extent.
You get zero because of m18, because it is like forward path, please refer
Design Procedures for a Fully Differential Folded-Cascode CMOS
Operational Amplifier

Thanks,
raj.

Title: Re: How to improve phase margine for conventional folded cascode OTA
Post by thechopper on Oct 17^th, 2011, 2:03pm

Hi,

Adc=gm2*Rout is not correct, since there is a current division on the current summing node given by the output resistance of the diff pair, active load and PMOS cascodes. Thus only a fraction of the current generated by gm2 will go to the load.
Assuming similar Rout for those three (although not the case according to the op points you showed)
Adc~gm2*Rout/3.

Your Adc (barely above 40dB) seems to be low for a typical folded cascode. Please check the op-point.

Minimizing drain and sources area in both PMOS and NMOS cascodes will push higher poles even further away, so your UGF will increase.

Increasing gm2 and better balancing the output resistances in the summing node will also help.

Best
Tosei

Title: Re: How to improve phase margine for conventional folded cascode OTA
Post by Larry_80 on Oct 17^th, 2011, 5:18pm

The effective differential mode transconductance (Gmd) is approximately gm2 and not a fraction of it based on any sort of current divider like you assert! please draw the small signal model and verify.

Title: Re: How to improve phase margine for conventional folded cascode OTA
Post by Larry_80 on Oct 17^th, 2011, 5:23pm

How can increasing gm2 help your phase margin?? your gm2 is in the numerator of your UGBW frequency eqtn, in other to improve PM, you want to reduce the UGBW frequency as a result, you must decrease gm2 and not increase it! I stand corrected.

Title: Re: How to improve phase margine for conventional folded cascode OTA
Post by Larry_80 on Oct 17^th, 2011, 5:49pm

I have re-done the analysis and i got the ffg for Adc:

Adc = gm2/[ (gds2+gds4)*(gds5/Gm5)+(gds7)*(gds8/Gm8)]
where Gmn=gmn+gmbn

Title: Re: How to improve phase margine for conventional folded cascode OTA
Post by Praveen K on Oct 18^th, 2011, 12:02am

Hi Raj,

that reference on folded cascode was a good read, thanks.

Hi Ashutosh,

if you follow the reference given by raj, i think you will understand that the PM of this circuit is only governed by the parasitic at the cascode node ( source of M18).

one suggestion, don't tie the body of M18 to source, instead tie it to VDD, this will reduce the gate to bulk cap. reduce the size of M18, as your Cgsm18 also dominates at this node.
by doing this, your compromising the output swing!!!

in the AC response you attached i think your are plotting the half circuit gain, that is why your gain is at 40dB.

k.praveen

Title: Re: How to improve phase margine for conventional folded cascode OTA
Post by Ashutosh_rane on Oct 18^th, 2011, 1:21am

Praveen K wrote on Oct 18^th, 2011, 12:02am:

hi praveen thanks for reply...

i have taken half circuit gain only....is that wrong??....how to calculate fully differential gain of fully diff. amplifier??(using spectre)

Title: Re: How to improve phase margine for conventional folded cascode OTA
Post by raja.cedt on Oct 18^th, 2011, 1:36am

@praveen: Connecting body to vdd is ok from cap point of view, but also signal current from differential pair will divide at m1 drain and m18 source, so now impedance looking into M18 source will be 1/(gm18+gmb18), hence improvement in the gain as well as UBG. But i didn't understand how this reduces the swing?

@thechopper: You have to improve gds2 to get better balance for Rout (i guess it's a typo)

Thanks,
raj.

Title: Re: How to improve phase margine for conventional folded cascode OTA
Post by raja.cedt on Oct 18^th, 2011, 2:01am

hello praveen,
if you connect bulk to vdd, vt will increase and swing will decrease..sorry i forgot in the previous post and asked you....

Title: Re: How to improve phase margine for conventional folded cascode OTA
Post by thechopper on Oct 18^th, 2011, 6:39am

Larry_80 wrote on Oct 17^th, 2011, 5:49pm:

Adc = gm2/[ (gds2+gds4)*(gds5/Gm5)+(gds7)*(gds8/Gm8)]
where Gmn=gmn+gmbn

True only under certain conditions. Your expression assumes gm5 >> gds2, gds4 and gds5, which is not necessarily true, especially when Id is high. A general expression for the folded cascode can be found if you consider the combo of M2, M4 and M5 as an equivalent transconductance amplifier with a corresponding output resistance, which will be loaded with M7 and M8.
If you run that analysis you will find that:

GMeq = gm2 * (gm5+gds5) / (gm5+gds2+gds4+gds5) and
Go eq = gds5 * (gds2 + gds4) / gm5

Thus Adc = GM eq / (Goeq + gds7*(gds8/Gm8))

As you can see if gm5 is not >> gds2,4,5, then Adc cannot be simplified to your expression.
Since gm5 is proportional to √Id while gds5 is to Id, as you increase Id gm5 and gds5,4,2 will get closer in value to each other and the general formula should be used.

Note: in GMeq and Goeq you can see the current splitting effect I was talking about.

Best
Tosei

Title: Re: How to improve phase margine for conventional folded cascode OTA
Post by thechopper on Oct 18^th, 2011, 6:39am

raja.cedt wrote on Oct 18^th, 2011, 1:36am:

Yes raja, that was a typo. Thanks

Tosei

Title: Re: How to improve phase margine for conventional folded cascode OTA
Post by raja.cedt on Oct 18^th, 2011, 7:12am

hello Tosei ,
your Gout is wrong seems...

a. Conductance looking down from output=gds8*gds7/gm8
b.Conducatnce looking up from output=gds5*(gds4+gds2)/gm5
so total Gout is sum of these two.

Thanks,
raj.

Title: Re: How to improve phase margine for conventional folded cascode OTA
Post by thechopper on Oct 18^th, 2011, 7:15am

raja.cedt wrote on Oct 18^th, 2011, 7:12am:

Raja,

Look at my Adc expression and you will see the total conductance is the same one you suggest.

Tosei

Title: Re: How to improve phase margine for conventional folded cascode OTA
Post by Praveen K on Oct 18^th, 2011, 11:42pm

Hi Tosei,

can you please explain how you arrive at this Gm expression

>>>GMeq = gm2 * (gm5+gds5) / (gm5+gds2+gds4+gds5)

is it by the small signal model or some intuitive method?

hi Ashutosh,

>>>i have taken half circuit gain only....is that wrong??....how to >>>calculate fully differential gain of fully diff. amplifier??(using spectre)

I'm also learning to do this stability analysis for full diff amp. there are some discussions in this forum itself,

http://www.designers-guide.org/Forum/YaBB.pl?num=1268207804

http://www.designers-guide.org/Forum/YaBB.pl?num=1170321868

The above two talks about using cmdmprobe to do STB, there is something called diffstbprobe which is new.

http://www.cadence.com/Community/forums/t/20208.aspx

regards,
praveen

Title: Re: How to improve phase margine for conventional folded cascode OTA
Post by raja.cedt on Oct 19^th, 2011, 12:39am

hello praveen,
signal current from gm2 will be dividing at drain of Q4, there you have 4 branches whose coductances are gds4,gds2,gds5 and gm2. so find the total current flowing through gds5 and gm5 (means total current through 5), hence gm2*(gds5+gm5)/(gds5+gm5+gds4+gds2)

Thanks,
raj.

Title: Re: How to improve phase margine for conventional folded cascode OTA
Post by thechopper on Oct 19^th, 2011, 5:25am

Hi Praveen,

What Raja explained is correct. It is basically the current division in the folding node into the different branches hanging from there.

Best
Tosei

Title: Re: How to improve phase margine for conventional folded cascode OTA
Post by Ashutosh_rane on Oct 19^th, 2011, 8:54am

Praveen K wrote on Oct 18^th, 2011, 11:42pm:

hello praveen ,
thank for ur reply, ..but
i asked about how to calculate differential gain for a fully differential opamp because when we do ac analysis we get single ended gain . but same procedure done for diff gain it gives gain in "-"dB's (not correct ... :-/)...so how to get the differential gain of opamp??is it just addition of two gain on single ended or single ended gain is only differential gain??

Title: Re: How to improve phase margine for conventional folded cascode OTA
Post by raja.cedt on Oct 19^th, 2011, 8:59am

hello Ashutosh_rane
.ac will give gain each and every point, it is up to you what to infer. For a fully diferential amp just find voutp-voutn, or simply add 6 db for single ended gain (any how you know that both nodes swings out of phase, if CMFB is working fine)

Thanks,
raj.

Title: Re: How to improve phase margine for conventional folded cascode OTA
Post by Ashutosh_rane on Oct 19^th, 2011, 9:08am

thank u raja

Title: Re: How to improve phase margine for conventional folded cascode OTA
Post by Praveen K on Oct 19^th, 2011, 9:30pm

Hi raj and tosei,

thanks for the explanation on Gm.

regards,
praveen. K

Title: Re: How to improve phase margine for conventional folded cascode OTA
Post by weber8722 on Nov 17^th, 2011, 8:13am

For that simple op-amp type PM is normally good. Probably your transistors are too big, i.e. too large caps compared to load cap. ;D

Title: Re: How to improve phase margine for conventional folded cascode OTA
Post by vivkr on Nov 18^th, 2011, 12:02am

agree fully with this last post here. I've designed folded cascode OTAs countless number of times and never ever had to worry about the PM in the standard version. So you must be doing something weird if you are running into this problem. Probably the folding transistors are way too big and the load cap too small in comparison.

The elimination of the compensation problems is the number one selling point for folded cascode OTAs. So I would advise you to try and fix the problem.

Vivek

Title: Re: How to improve phase margine for conventional folded cascode OTA
Post by RobG on Nov 21^st, 2011, 5:46pm

I'm late to this party so I'm probably in left field, but those PMOS transistors appear to have their bulks tied to the drains, not the source. That would qualify as "something weird."