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Message started by mixed_signal on Oct 26th, 2011, 9:32pm

Title: switch sizing in switched capacitor filters
Post by mixed_signal on Oct 26th, 2011, 9:32pm

Hi,

I am designing a switched capacitor filter in 250um technology, 1v operating in weak inversion.

1.I want to know how to size the switches.

2. I want to use atleast 2Lmin because short channel affect causes Ids to get saturated very early to low values in case of Lmin.

3. I am going for NMOS switches due to supply constraint of 1v.

4. What should be the widths? I am not able to trade off resistance v/s parasitics. What is the technique to size it?

Thanks,
:)

Title: Re: switch sizing in switched capacitor filters
Post by mixed_signal on Oct 26th, 2011, 9:34pm

I m sorry!  the technology is 250nm :)

Title: Re: switch sizing in switched capacitor filters
Post by raja.cedt on Oct 27th, 2011, 1:13am

hello mixed_signal,
A switch has to be in triode always to give less on resistance.
In theory lenght has to be as low as posb to give less Ron, but due to limited supply you have to chose a Lmin based on Vth (typically it varies with L, due to short channel effect it will reduce with length but to reverse short channel effect or retrogate channel profile it may increase with decres in lenght) so simulate and compremise some where. Where as width can be chosen from on state voltage drop, which will be decrease with increase in the width but higher will impact your switch cap settling. So i sugget you to put in siimulation get some set of L and W, now simulate Switchcap.

But one question is you are working with 250nm tech, i guess you will have min of 1.8 supply(up to my knoledge on TSMC tech).

Thanks,
Raj.

Title: Re: switch sizing in switched capacitor filters
Post by rajkumar palwai on Oct 27th, 2011, 7:55am

Hi Mixed-signal,
Typically, the resistance of the switch is chosen such that the corner freq formed by it with the cap (1/2*pi*Rsw*C) is atleast 3-4 times the close loop UGB of the amplifier used in the filter. If ur amp closed loop UGB is 100 MHz, then make sure that zero formed by the switch resistance and cap is around 300-400 MHz.

By this u r pushing the zero formed by the series resistor-capacitor network away from the UGB and u dont see its effect in filter settling.

The following article may help you.
"settling time design considerations for sc integrators" by uma chilakapati.

-rajkumar

Title: Re: switch sizing in switched capacitor filters
Post by mixed_signal on Oct 27th, 2011, 10:52am

Thank you raja.cedt and rajkumar palwai for you valuable replies. :)

Title: Re: switch sizing in switched capacitor filters
Post by loose-electron on Oct 27th, 2011, 4:51pm


above suggestions good
weakest corner for transistors
RC pole at 7-10X the desired channel BW

consider clock boosting methods if you need
better headroom and linearity and a smaller switch size.

Title: Re: switch sizing in switched capacitor filters
Post by mixed_signal on Oct 27th, 2011, 10:54pm

Thank you loose electron.

I have a basic doubt. I am simulating an NMOS switch. Suppose I have tied gate to vdd=1v (switch is on), source to a capacitor and drain to 800mv. I want to see the maximum output voltage of my switch i.e. the capacitor voltage. The expected value is vdd-vth , right? But when I ran a DC simulation i found voltage at the capacitor is always equal to the applied drain voltage. How can I simulate it?

Thanks :)

Title: Re: switch sizing in switched capacitor filters
Post by mixed_signal on Oct 27th, 2011, 11:00pm

Hi,
How can we ensure that switch is always in triode. By making gate voltage larger than the possible voltages of source and drain  right?

In mOS since gate and drain are identical, in a switch which one is source and drain. The node with a higher potential is the drain in NMOS right? So its going to get exchanged if potential changes during say charging and discharging, right?

Title: Re: switch sizing in switched capacitor filters
Post by raja.cedt on Oct 28th, 2011, 12:57am

hello mixed_signal,
yes you are correct, in theory drain voltage will stop at vin-vth, but in .DC  simulations may be leakage will get you the Vin many times (if you have enough time and dc simulation means steady state simulation) or think like mosfet and cap is like RC low pass filter and when o/p goes near to vin-vth, mosfet R increase like any thing and time constant will increase.

Thanks,
Raj.

Title: Re: switch sizing in switched capacitor filters
Post by mixed_signal on Oct 28th, 2011, 8:52am

Thank you Raj!
How can we ensure that switch is always in triode. By making gate voltage larger than the possible voltages of source and drain  right?

In mOS since gate and drain are identical, in a switch which one is source and drain. The node with a higher potential is the drain in NMOS right? So its going to get exchanged if potential changes during say charging and discharging, right?

Thanks

Title: Re: switch sizing in switched capacitor filters
Post by raja.cedt on Oct 28th, 2011, 9:05am

hello mixed_signal,
make sure that you have less Vds compared to Vgs (this is very common case because for switched you gives full vdd to gate while turn on) and i haven't done any thing special to keep in triode.

regarding your last question, yes they do exchange terminals, but they are in triode, vds is really low so it doesn't matter which is S and D.

Thanks,
Raj.

Title: Re: switch sizing in switched capacitor filters
Post by rajkumar palwai on Oct 28th, 2011, 10:05am

@mixed signal,
Typically in switched cap filters they use boosted switches to get constant resistance across all input voltages. In this technique they charge a big cap to vdd in half cycle and then keep it across the sampling switch gate and source in the other half cycle. So if source voltage is 'vin' , then gate voltage would be 'vin + vdd'. So the switch sees a Vgs of 'VDD' always and u get least resistance possible for a given width and length.

However the cap should be much bigger compared to the parasitic Cgs of the switch to reduce charge sharing effects.

Title: Re: switch sizing in switched capacitor filters
Post by loose-electron on Oct 28th, 2011, 11:39am

consider a pass gate configuration

NMOS in parallel with PMOS

NMOS good for low voltages, PMOS good for high voltages.

For clock boosting methods see:
inst.eecs.berkeley.edu/~ee247/fa06/lectures/L19_f06.pdf

Title: Re: switch sizing in switched capacitor filters
Post by mixed_signal on Oct 28th, 2011, 10:43pm

Thank you everyone for your valuable replies. :)

Where should the body of a switch be connected. I m using NMOS switch. should i connect it to ground or the source?

Practically (in real circuits) are the switches in switch capacitor circuits  laid out seperately so that their body can be connected to source to remove body effect. I have heard of deep trench isolation where nmos bulk can be seperated from the substrate.

If i connect body to ground then will the non linearity arising due to body effect cause problem? Simulation seems to be OK.

Thanks

Title: Re: switch sizing in switched capacitor filters
Post by raja.cedt on Oct 29th, 2011, 12:38am

hello rajkumar,
are you talking about gain boosting technique, where charge pump will be used to get more supply ..

Thanks,
Raj.

Title: Re: switch sizing in switched capacitor filters
Post by rajkumar palwai on Oct 29th, 2011, 2:06am

@ mixed signal,
To reduce the non-linearity due to bulk node , you can do the following.

During the hold phase connect the bulk to ground and during the sampling phase, connect the bulk to input.

So, during the sampling mode ur Vbs=0 and hence u dont see any non-linearity. Also in the hold mode, ur bulk is tied to ground so that no junction diode is forward biased independent of input signal level.

-rajkumar

Title: Re: switch sizing in switched capacitor filters
Post by rajkumar palwai on Oct 29th, 2011, 2:13am

@raja,

Yes, part of the circuit uses charge pump to get higher voltages to be able to charge to cap to VDD. Its a standard circuit. I forgot the exact article which gave this architecture.

Title: Re: switch sizing in switched capacitor filters
Post by loose-electron on Oct 29th, 2011, 12:00pm


mixed_signal wrote on Oct 28th, 2011, 10:43pm:
Thank you everyone for your valuable replies. :)

Where should the body of a switch be connected. I m using NMOS switch. should i connect it to ground or the source?

Practically (in real circuits) are the switches in switch capacitor circuits  laid out seperately so that their body can be connected to source to remove body effect. I have heard of deep trench isolation where nmos bulk can be seperated from the substrate.

If i connect body to ground then will the non linearity arising due to body effect cause problem? Simulation seems to be OK.

Thanks


generally body of NMOS is part of substrate.

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