The Designer's Guide Community Forum

The Designer's Guide Community Forum
https://designers-guide.org/forum/YaBB.pl
Design >> Analog Design >> divider self oscilation frequency
https://designers-guide.org/forum/YaBB.pl?num=1320568928

Message started by raja.cedt on Nov 6^th, 2011, 1:42am

Title: divider self oscilation frequency
Post by raja.cedt on Nov 6^th, 2011, 1:42am

hello all,
I have implimented high frequency Bicmos static divider (working @ 100GHz), it is working in transient but i want to simulate self-oscilation frequency of the oscilator, so i just biased the clock input, without appling the clock signal but i haven't seens oscilations. Can any one suggest me what the problem (my latch is working fine). I thought of posting schematic but it's a common CML master and slave flip-flop.

Thanks,
Raj.

Title: Re: divider self oscilation frequency
Post by loose-electron on Nov 6^th, 2011, 5:20am

Inject some noise into the system.
In a simulation no noise unless you define it.
No noise and most oscillators will sit at a center bias point.

Title: Re: divider self oscilation frequency
Post by raja.cedt on Nov 6^th, 2011, 5:32am

hello loose-electron,
yes you are correct, i used to keep some intial condition for oscilations by default.

Thanks,
Raj.

Title: Re: divider self oscilation frequency
Post by loose-electron on Nov 6^th, 2011, 5:35am

happy to help

Title: Re: divider self oscilation frequency
Post by raja.cedt on Nov 12^th, 2011, 9:46am

hello loos-electron,
I did PSS for the divider, it showing 30GHz. Did you observe this any time, in transient it is not working with a stimulus..any guess on this?

Thanks,
Raj.

Title: Re: divider self oscilation frequency
Post by loose-electron on Nov 14^th, 2011, 10:06am

would need to know more specifics about your circuit, test conditions and simulation setup