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Design >> Analog Design >> Practical Miller-Cap Multiplication Factors
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Message started by awg on Dec 9^th, 2011, 7:38pm

Title: Practical Miller-Cap Multiplication Factors
Post by awg on Dec 9^th, 2011, 7:38pm

Hello,

I'm experimenting around with Miller Capacitance Multiplication and was wondering if anyone could give me a realistic range of capacitive multiplier factor one could design. Right now I can reach 3x quite easily (in an R-C circuit, with the Miller C connected between the input and output of an inverting gain amp.)

Is 5x achievable? How about 10x? I'm looking for the best bang for the buck - to keep the main capacitor small.

Thanks,
Joe W.

Title: Re: Practical Miller-Cap Multiplication Factors
Post by analogbeginer on Dec 10^th, 2011, 2:16am

Yes, i guess. While using current multiplication structure u can implement a better cap, but at the cost of burning extra DC current....

Title: Re: Practical Miller-Cap Multiplication Factors
Post by raja.cedt on Dec 10^th, 2011, 3:13am

it's a matter of amplifier design at the frequency of interest with 5 gain. Whats the problem?

Thanks,
Raj.

Title: Re: Practical Miller-Cap Multiplication Factors
Post by analogbeginer on Dec 10^th, 2011, 5:35am

I totally agree with raja!.

Title: Re: Practical Miller-Cap Multiplication Factors
Post by RobG on Dec 10^th, 2011, 7:55pm

Hey Joe... As you know, the miller multiplier (MM) will be Vout/Vin+1. So suppose you had a gain of 100, in theory your MM should be 101. Well, what if Vin = 1V? Obviously the other side of the cap isn't going to be swinging 100V. Well not more than once anyway. Nope, it will swing to Vdd so the MM will always be less than (1+Vdd/Vin). At least that is how I remembered the way it worked.

Tell your boss he owes me $35 now ;)

rg

Title: Re: Practical Miller-Cap Multiplication Factors
Post by RobG on Dec 10^th, 2011, 7:58pm

sushan wrote on Dec 10^th, 2011, 2:16am:

Yes, i guess. While using current multiplication structure u can implement a better cap, but at the cost of burning extra DC current....

I was just thinking the same thing... mirror the cap current and feed it back to synthesize a cap on the node. Do you have a circuit?

Title: Re: Practical Miller-Cap Multiplication Factors
Post by raja.cedt on Dec 11^th, 2011, 6:23am

hello Robg,
what is this 1v and 100v, miller multiplication is a small signal approximation (which has a very less dynamic range, of course it depends on the architecture).

Thanks,
Raj.

Title: Re: Practical Miller-Cap Multiplication Factors
Post by raja.cedt on Dec 11^th, 2011, 6:27am

forgot one thing, when you are more worried about dynamic range probably current mode miller multiplication cap better idea, due to high linear nature of current mirror. Correct me if am wrong.

Thanks,
raj.

Title: Re: Practical Miller-Cap Multiplication Factors
Post by analogbeginer on Dec 11^th, 2011, 6:56am

@RobG, the simple circuit will be a cap connected to a diode connected transistor & having this current mirrored by a factor of A times, to realize a cap of (A+1)time, but we will be burning a lot of DC current required for biasing the MOS. But there are some architectures, which do it in a efficient way ( like implementing the mirrored stage as differential stage). But the underlying problem is we will get cap multiplication in addition to Series & Shunt resistance, which is a headache.

Title: Re: Practical Miller-Cap Multiplication Factors
Post by raja.cedt on Dec 11^th, 2011, 7:06am

hello analog begner,
could you please point out any reference for efficient way? The whole point in using current mirror based wide dynamic range, will this efficient way's still maintain that and i didn't understand the shunt resistance concept in your previous post, i understood series resistance of 1/gm .

Thanks,
raj.

Title: Re: Practical Miller-Cap Multiplication Factors
Post by awg on Dec 11^th, 2011, 7:27am

Thanks Rob and Raja,

I'm not building an amplifier, but rather kicking around the idea of implementing miller multiplication to save capacitor layout area (at the cost of add'l current consumption.) But, not sure what a practical range that is achievable.

Joe W.

Title: Re: Practical Miller-Cap Multiplication Factors
Post by raja.cedt on Dec 11^th, 2011, 7:34am

hello awg,
i would like to some last comment. In some places you can use miller technique to reduce the area but certainly there are some application which needs capacitor to supply fast current pulses, in that cases miller idea will fail because after all it is also a loop not an ideal cap and keep in mind about dynamic range.

Thanks,
Raj.

Title: Re: Practical Miller-Cap Multiplication Factors
Post by RobG on Dec 11^th, 2011, 12:12pm

raja.cedt wrote on Dec 11^th, 2011, 6:23am:

hello Robg,
what is this 1v and 100v, miller multiplication is a small signal approximation (which has a very less dynamic range, of course it depends on the architecture).

Thanks,
Raj.

No it is not a small signal thing - it is from I = C*dv/dt, where dv/dt is the voltage across the cap. If you use gain the cap voltage will be larger, thus dv/dt will be larger, making the cap *appear* larger for any signal big or small.

The point was that you need to remain within the output range of the amplifier, if it wasn't for that you could have as much gain as you need.

Title: Re: Practical Miller-Cap Multiplication Factors
Post by raja.cedt on Dec 11^th, 2011, 12:25pm

hello Robg,
I didn't understand what do you mean by 'No it is not a small signal thing'. cap will get charged by vin+(A*vin), so here what is A, is it large signal parameters?

Thanks,
Raj.

Title: Re: Practical Miller-Cap Multiplication Factors
Post by RobG on Dec 11^th, 2011, 2:22pm

A is simply the gain.That is, the ratio of the voltage on one side of the cap to the other side (with sign inverted). If the voltage on one side of the cap is -A*Vin, the total voltage across the cap is (1+A)*Vin. You could get this gain with an opamp or any amplifier.

It doesn't matter if the output is millivolts or megavolts, the equation gives the same result. HOWEVER, in real designs we are limited by how much the output signal can swing before it saturates the opamp.

Try it with a cap across an inverter being charged by a current source and you will see that it is the non-linearity when it hits the rail that kills you: Assume the inverter has a gain of A. When the input is at 0V, it will charge like a 1x cap because the output of the inverter is pegged at the rail. Once the input reaches (Vdd/2)*(A-1)/A the inverter's output will start to move and the cap will look like C*(1+A). But here is the kicker... it will only do that over a range of (Vdd)/A.

If you calculate the amount of time it takes for the input to get to Vdd/2, it is equal to the amount of time it *would* have taken if you used 2*C for the cap. That is, the inverter will only double the effective cap value if you start at the bottom rail! This is true even if the inverter has infinite gain. Pretty weird. This is because the inverter is pegged to the top or bottom rail for almost all of the signal except for that tiny range in the middle between (Vdd/2)*(1-1/A) and (Vdd/2)*(1+1/A). If you can keep the signal inside that range you get the multiplication, but you lose it once the amplifier rails.

Personally, I'm not sure that Miller multiplication beyond 2x is practical outside of a feedback loop because of this - the input signal has to be so small to keep the output of the amplifier from pegging at the rail that the applications are limited. But if your desired gain is less than (1+Vdd/ΔVin) I guess it could work.

Title: Re: Practical Miller-Cap Multiplication Factors
Post by raja.cedt on Dec 11^th, 2011, 3:30pm

hello robg,
it was nice discussion with you regarding miller multiplication. I am assuming always amplifier in linear region (to be frank that is the region where we can as an amplifier) and in order satisfy this condition in my earlier post i have introduced by dynamic range term. Bottom line is we both are on the same line but 2x seems smaller range but in open loop many people implemented around 10X in the contest of damping controlled frequency compensation of the op amps (of course cap is connected across gm/gm load opamp) .

Thanks,
Raj.

Title: Re: Practical Miller-Cap Multiplication Factors
Post by RobG on Dec 11^th, 2011, 3:40pm

Thanks Raja, I don't think we disagree on anything... we both are saying that the amp must remain in the linear region. My point is that it can be pretty tough to do that with a high gain amp, and Joe seemed to want this for an RC filter, not miller compensation.

Inside of an opamp feedback loop there shouldn't be any problem going far more than 10x because the feedback will force the input to be small.

rg

Title: Re: Practical Miller-Cap Multiplication Factors
Post by analogbeginer on Dec 12^th, 2011, 10:36pm

You can find the refernce from http://www.cs.york.ac.uk/rts/docs/SIGDA-Compendium-1994-2004/papers/2003/glsvlsi03/pdffiles/p2_12.pdf ....But I'm yet to simulate it.

Title: Re: Practical Miller-Cap Multiplication Factors
Post by RobG on Dec 13^th, 2011, 6:06am

Thanks for the reference AnalogBeginner.

I should mention to Joe to make sure and simulate noise with any active circuit he tries.

rg