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Modeling >> Behavioral Models >> try to simulate Ken Kundert's PLL phase noise prediction verilogA model
https://designers-guide.org/forum/YaBB.pl?num=1325477299

Message started by hearterinvest on Jan 1^st, 2012, 8:08pm

Title: try to simulate Ken Kundert's PLL phase noise prediction verilogA model
Post by hearterinvest on Jan 1^st, 2012, 8:08pm

Hello, I am trying to use Ken's verilog phase domain model in his paper.
I encountered several problems. The phase noise results is way too big compared to my lab test result(over 10 times), the AC sim also shows wrong stability analysis compared to real circuit based sim.
My questions:
1. anyone used Ken's model to predict PN? how accurate? can I just copy his code from paper, or need to modify somewhere?

2. can this phase domain model be used to do a bode plot to analyze stability, if yes, where should I add AC source to break the loop?

I appreciate any feedback who has sucessfully used Ken's code. a working testbench/netlist will highly appreciated.

I attached my netlist here(for stability sim), I am using spectre as simulator.
Heatt

>>>>>>>>>>>>>>>>>>>>>>>>>
`include "disciplines.vams"
`include "phase.vams"

module pll(out);
output out;
phase out;
parameter integer m = 1 from [1:inf); // input divide ratio
parameter real Kdet = 1 from (0:inf); // phase detector gain
parameter real Kvco = 100m from (0:inf); // VCO gain
parameter real c1 = 1n from (0:inf); // Loop filter C1
parameter real c2 = 200p from (0:inf); // Loop filter C2
parameter real r = 10K from (0:inf); // Loop filter R
parameter integer n = 1 from [1:inf); // feedback divide ratio
phase in, ref, fb;
electrical c;
oscillator OSC(in);
divider #(.ratio(m)) FDm(in, ref);
phaseDetector #(.gain(Kdet)) PD(ref, fbpfd, c);
loopFilter #(.c1(c1), .c2(c2), .r(r)) LF(c,gnd);
vco #(.gain(Kvco)) VCO(c, out);
divider #(.ratio(n)) FDn(out, fb);
V0 (fbpfd fb) vsource dc=0 mag=1 phase=0 type=dc
endmodule

ac ac start=10 stop=1e9 annotate=status
noise ( out) noise start=1k stop=1000M annotate=status