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Simulators >> Circuit Simulators >> Does Cadence Spectre have a function to turn off flick noise in noise simulatio?
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Message started by Jacki on Jan 17^th, 2012, 2:48am

Title: Does Cadence Spectre have a function to turn off flick noise in noise simulatio?
Post by Jacki on Jan 17^th, 2012, 2:48am

Hello,

I hear in eldo users can turn off flick noise in noise simulation. I don't know if there is the similar function in Cadence Spectre. I want to simulate the integrated noise for an opamp, but the integrated noise is too high. I think maybe the flicker noise disturbs, so I want to turn off it, and want to check how the result is if there is only thermal noise, is the integrated noise closed to KT/C.

Thanks.

Title: Re: Does Cadence Spectre have a function to turn off flick noise in noise simulatio?
Post by raja.cedt on Jan 17^th, 2012, 4:35am

hello,
many times i have turned off Kf parameters in models while doing noise simulations in H-spice, i guess this can be done independent of simulator.

One more thing in cadance you can select while display the results which noise you are more interested.

Thanks,
raj.

Title: Re: Does Cadence Spectre have a function to turn off flick noise in noise simulatio?
Post by Jacki on Jan 17^th, 2012, 5:24am

Hello Raj,

Thank you for your reply.

Could you please give more details about turn off flicker noise by setting Kf=0? Because usually the model libraries are in the server, I cannnot change it. Do you mean copy the model to local directory, then change it, and add them for the simulation.

Jacki.

Title: Re: Does Cadence Spectre have a function to turn off flick noise in noise simulatio?
Post by raja.cedt on Jan 18^th, 2012, 2:37am

yes..something like that. But this name Kf depends on the foundry..for TSMC models i did that.

Thanks,
Raj.

Title: Re: Does Cadence Spectre have a function to turn off flick noise in noise simulatio?
Post by Jacki on Jan 18^th, 2012, 3:07am

Hello Raj,

Thank you very much. I already modify the model and turn off the flicker noise.

Title: Re: Does Cadence Spectre have a function to turn off flick noise in noise simulatio?
Post by sheldon on Jan 18^th, 2012, 4:26am

Jacki,

You should use all the tools in the toolbox. In this case, the tool
you want to use is the ADE noise summary. It provides an itemized
list of noise contributors and it tells what the source of the noise
is. For example, for a bjt+rb, rc, ic, ... You should not and do not
need to modify the models.

Best Regards,

Sheldon

Title: Re: Does Cadence Spectre have a function to turn off flick noise in noise simulatio?
Post by Geoffrey_Coram on Jan 18^th, 2012, 7:17am

kf=0 only works for some noise models, for example bsim4's fnoimod=0. If your model has fnoimod=1, then you'll need to change that parameter also.

Title: Re: Does Cadence Spectre have a function to turn off flick noise in noise simulatio?
Post by Jacki on Jan 19^th, 2012, 9:29am

Thank you for your comments, Sheldon and Geoffrey_Coram.

Now I turn off the flicker noise by modifying the device models because I want to compare without the flicker noise, how large the integrated thermal noise is, and it seems without flicker noise, the integrated noise is reduced a lot, at least half. And if the fmin of the integration window is lower, like 1 Hz, the flicker noise is dominant in the total integrated noise.

Title: Re: Does Cadence Spectre have a function to turn off flick noise in noise simulatio?
Post by rf-design on Feb 23^rd, 2012, 4:51am

Models are only input textfiles to the tool.

If you have interest in the link between a specific physical effect modeled, described by a number in the model text file, and your circuit effect you should use it as inputs.

Barry Gilbert describe this method for some decades as "Foundation Design" because it gives you the best basis to understand the relationship between the physics of the devices and the topology and dimensioning of the circuits to overcome them. It lead finally to robust designs.

After these decades the foundries still provide "verification" enviroments, named "kits" instead of "design" enviroments. Some managers still think that is the most productive way to get to robust working circuits ;-)