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Design >> Analog Design >> Decaps in the schematics
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Message started by zahrein on Jan 30^th, 2012, 4:45pm

Title: Decaps in the schematics
Post by zahrein on Jan 30^th, 2012, 4:45pm

HI All,
When we design a circuits/schematics. The layout guy will certainly put the decaps after we design it. My question is, what is the function of the decaps and does it impact the performance of the design? I observe the decaps were connected to voltage rails. Can anyone helps?

Title: Re: Decaps in the schematics
Post by aaron_do on Jan 30^th, 2012, 5:14pm

Hi,

at RF, decoupling capacitor placement and design can be very important. The supply line connecting the supply to the circuit has some inductance and resistance which prevents it from reacting quickly to fast changes in the current drawn from the supply. Having a decoupling capacitor close to the circuit provides a large well of electrons for the circuit to draw from during transients.

I think there is a document on this website somewhere with a good discussion on supply decoupling. BTW, I said at RF because that's what I mostly work on, but I'm sure in other areas it is also very important.

regards,
Aaron

regards,
Aaron

Title: Re: Decaps in the schematics
Post by zahrein on Jan 30^th, 2012, 5:37pm

HI Aaron, thanks for the sharing. now i undertstand. Since my supply voltage is ideal, hence there is no affect on my analog funvtions/prformance when the layout put the decaps. We have decaps to prevent fast changes of current drawn from the supply.

Title: Re: Decaps in the schematics
Post by loose-electron on Jan 30^th, 2012, 9:04pm

You may want to change your power supply model a bit, put 10nH in series with .25 ohms in both the power and ground connections back to the ideal power supply.

Thats a rough set of numbers. for the bond wire interconnect and the resistance of the interconnect.

Title: Re: Decaps in the schematics
Post by Lex on Jan 31^st, 2012, 12:14am

Decoupling caps on reference/bias lines also help lower the noise (a result of lowering the bandwidth).

It can go wrong as well in some cases, for example when a reference w.r.t. VDD is decoupled to VSS or vice verse. Clear communication is required between designer and layouter to prevent these errors.

Title: Re: Decaps in the schematics
Post by RobG on Feb 1^st, 2012, 9:27am

aaron_do wrote on Jan 30^th, 2012, 5:14pm:

I think there is a document on this website somewhere with a good discussion on supply decoupling. BTW, I said at RF because that's what I mostly work on, but I'm sure in other areas it is also very important.

Here you go: http://www.designers-guide.org/Design/bypassing.pdf

Title: Re: Decaps in the schematics
Post by raja.cedt on Feb 1^st, 2012, 9:42am

hello zahrein,
when you draw switching current(or spikes ) out of supply (for example when you have big digital ckt on vdd), you will end up with voltage dip due to it's power grid resistance and inductance, so if you please a big capacitor across the vdd it supplies sudden spiky current and vdd supply dc current. Hence there is no dip on the supply.

Thanks,
raj.