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Design >> Analog Design >> Multiple power domain Analog layout
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Message started by IvoryDesigner on Feb 2^nd, 2012, 9:24pm

Title: Multiple power domain Analog layout
Post by IvoryDesigner on Feb 2^nd, 2012, 9:24pm

Hi,

I'm doing the Layout of an analog circuit with 2 power domain VDD=1.8V and VCC=3.3V. Both have the same ground = 0V.

My question is:
- is it better, in the layout of the ASIC to separate both ground in the ASIC, even if there are connected on the PCB outside and they share the same subtract (As it's done to separate digital and analog part)

- Or at the contrary it is better to physically connect both ground in the ASIC with metal ??

What is the best and why ?

Thanks!

Ivory

Title: Re: Multiple power domain Analog layout
Post by aaron_do on Feb 3^rd, 2012, 1:57am

Hi,

I think generally a star connection is best which implies they should be connected off-chip. This is to avoid ground loops. You should also have the supply current which comes in from one side of the chip to leave on the same side in order to minimize supply inductance.

Maybe somebody with more experience in this matter can give a better answer.

regards,
Aaron

Title: Re: Multiple power domain Analog layout
Post by loose-electron on Feb 4^th, 2012, 11:13am

Depends -

For ESD its better to have the grounds connected at the I/O ring ground.

Typically the I/O ring is the single point in a star grounding system.
(One cut in the ring.)

Is the low voltage ground purely digital circuits and no analog?
If so, I would have one analog ground, and one digital ground
both brought out thru multiple ground pins and tied together
on the PCB.

Why? You are trying to avoid inductive "pumping-bounce"
on the digital ground from being on the analog ground.

Good PCB ground is lower impedance than the I/O ring.

At really high frequencies its going to be capacitively tied together
no matter what you do.

Title: Re: Multiple power domain Analog layout
Post by aaron_do on Feb 5^th, 2012, 6:08pm

Hi loose-electron,

Quote:

For ESD its better to have the grounds connected at the I/O ring ground.

Could you explain this a bit more?

I guess for an analog ASIC (it was mentioned in the original post), it depends on the application.

regards,
Aaron