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https://designers-guide.org/forum/YaBB.pl Design >> Analog Design >> Paper recommendation on low power dual modulus prescaler https://designers-guide.org/forum/YaBB.pl?num=1328915580 Message started by lunren on Feb 10th, 2012, 3:13pm |
Title: Paper recommendation on low power dual modulus prescaler Post by lunren on Feb 10th, 2012, 3:13pm Hi All, I am starting to design a 2.4GHz PLL. The power consumption is the most important parameter in this chip. I'm think to use a prescaler of div8/9. Any low power scheme/papers recommendation are appreciated. Current thinking is TSPC DFF based design. Any potential issues with TSPC? Thanks, Lunren |
Title: Re: Paper recommendation on low power dual modulus prescaler Post by raja.cedt on Feb 11th, 2012, 1:19am hello, please refer RF micro-electronics books, there you find some papers on TPST. Thanks, Raj. |
Title: Re: Paper recommendation on low power dual modulus prescaler Post by lunren on Feb 14th, 2012, 12:25am Hi Raj, Thanks for recommendation. What does TPST stand for? Regards, Lunren |
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