The Designer's Guide Community Forum

The Designer's Guide Community Forum
https://designers-guide.org/forum/YaBB.pl
Design >> Analog Design >> How to calculate the minimum detectable input voltage for a comparator?
https://designers-guide.org/forum/YaBB.pl?num=1329756321

Message started by Jacki on Feb 20^th, 2012, 8:45am

Title: How to calculate the minimum detectable input voltage for a comparator?
Post by Jacki on Feb 20^th, 2012, 8:45am

Hello,

I want to design a 9-bit accuracy comparator with the 1LSB=2mV at the input. Now I want to calculate the specification of comparator.

For traditional comparator which consists of a pre-amplifier and latch, it is easy to get the minimum detectable input voltage by Vo/Av. Then latch will lock the state. If I want to improve the resolution, I can easily increase the gain.

But now a lot of designers like to use positive feedback comparator. It doesn't need the pre-amplifier any more. In this case I don't know how to calculate the minimum detectable input voltage. I ask some people, they told me just simulate the comparator to see if it is good enough. I think for analog design, it should be calculated, and I want to know how.

Thanks.

Title: Re: How to calculate the minimum detectable input voltage for a comparator?
Post by AnalogDE on Feb 20^th, 2012, 8:53am

See the white paper on this site about Offset simulation of comparators. You should be able to setup a testbench to simulate this..

Does your comparator have a pre-amplification phase followed by a latch phase? Can you post a schematic?

Title: Re: How to calculate the minimum detectable input voltage for a comparator?
Post by Vladislav D on Feb 21^st, 2012, 6:03am

By "positive feedback comparator" I guess you imply a dynamic comparator which does not consume DC current?
First of all, a latch always has a positive feedback. Placing an amplifier in front of the latch, makes the response faster with a small input signal since the regeneration time is a function of the input voltage at the latch input. Dynamic comparators have a latch as well.

Now, the meaning of the positive feedback is that, even with a very small voltage, it (positive feedback) starts the regeneration process until the output hits the rail. So, the minimum detectable signal is a function of time, and will be infinitely small if you wait infinitely long, assuming that there is no noise in the circuit. Moreover, comparator is a strongly non-linear device, what makes somewhat difficult to describe it's behavior mathematically.

I would recommend to start a study of dynamic comparators from the StrongArm comporator.

Title: Re: How to calculate the minimum detectable input voltage for a comparator?
Post by Jacki on Feb 22^nd, 2012, 4:07am

Thank you very much, AnalogDE and Vladislav D,

I think I mean the dynamic comparator which does not cost any DC currents because the comparator is espected to use in a SAR-ADC.

I read some information about comparator from Allen's book, it seems for a comparator, it should include two steps. First is the small signal mode, and the following is large signal mode. In small signal mode, can I analyze the minimum input voltage and at the same time the comparator should work as an amplifier without any compensation?

Or maybe I misunderstand the dynamic comparator which maybe in fact has no small signal mode, it is throughly a non-linear circuit, like VCO. Therefore I don't need consider the minimum input voltage, and just consider the time response.

Please correct me if I speak anything wrong.

Title: Re: How to calculate the minimum detectable input voltage for a comparator?
Post by RobG on Feb 26^th, 2012, 5:06pm

A positive feedback latch is always going to flip so there isn't a minimum signal in that respect, although the signal has to be greater than the noise if you want it to flip in the correct direction.

I'd say that the minimum signal will be determined by metastability. Metastability is when the latch takes too long to resolve because the signal is too small.

Maybe someone could comment on how best to simulate metastability.

rg

Title: Re: How to calculate the minimum detectable input voltage for a comparator?
Post by loose-electron on Feb 27^th, 2012, 2:21pm

RobG wrote on Feb 26^th, 2012, 5:06pm:

Take the input signals and transition from max overdrive in one direction, to the smallest signal needing to be detected in the opposite direction.

That will show the slowest response time and all kinds of interesting metastability issues.

Title: Re: How to calculate the minimum detectable input voltage for a comparator?
Post by RobG on Feb 27^th, 2012, 6:12pm

loose-electron wrote on Feb 27^th, 2012, 2:21pm:

That works very well with continuous time comparators, but I was thinking about comparators that latch, and that are reset before each conversion. For these dynamic comparators you could certainly start the latch with zero input and see how long it would take to flip one way or another, but I have the feeling that the answer you get will be a function of the numerical solution algorithm rather than what you could realistically expect.

Not sure of a proper way to do it, but I remember reading something about estimating the metastability time.

Title: Re: How to calculate the minimum detectable input voltage for a comparator?
Post by RobG on Feb 27^th, 2012, 7:29pm

RobG wrote on Feb 27^th, 2012, 6:12pm:

Not sure of a proper way to do it, but I remember reading something about estimating the metastability time.

I found a designer's guide article about the calculation: http://www.designers-guide.org/Analysis/metastability.pdf

Title: Re: How to calculate the minimum detectable input voltage for a comparator?
Post by carlgrace on Feb 29^th, 2012, 4:15pm

RobG wrote on Feb 27^th, 2012, 6:12pm:

loose-electron wrote on Feb 27^th, 2012, 2:21pm:

I think loose-electron's method works fine for switched comparators. It can scare out any memory effects and the like that can come back to bite you.