The Designer's Guide Community Forum
https://designers-guide.org/forum/YaBB.pl
Design >> Analog Design >> Passive filter Implementation
https://designers-guide.org/forum/YaBB.pl?num=1330336284

Message started by gido on Feb 27th, 2012, 1:51am

Title: Passive filter Implementation
Post by gido on Feb 27th, 2012, 1:51am

Hello,
I am designing a high-pass filter for a cut off frequency of 0.05 Hz. I would like to know if it would be ok to use a passive filter implementation....

Title: Re: Passive filter Implementation
Post by raja.cedt on Feb 27th, 2012, 2:40am

hello,
it's up to you, 0.05 cutoff frequency means large area!!!, so i would suggest active.

Title: Re: Passive filter Implementation
Post by Lex on Feb 27th, 2012, 4:00am

Or digital?

Title: Re: Passive filter Implementation
Post by gido on Feb 27th, 2012, 5:04am

ok. But i was thinking of switched capacitor implementation of resistors which would probably obviate the large resistors hence large area.

Would that be advisable if the high pass filter is to be used in a SOC ECG .
An instrumentation amp comes before the HPF and a VGA comes after it.
Thank you.

Title: Re: Passive filter Implementation
Post by loose-electron on Feb 27th, 2012, 2:17pm

Why not a control feedback system to get rid of the DC?

Title: Re: Passive filter Implementation
Post by gido on Feb 28th, 2012, 12:10am

ok .  Loose-electron, please can u suggest some good links where i can find the control feedback stuff? I am not conversant with it,.
Thanks.

Title: Re: Passive filter Implementation
Post by loose-electron on Feb 28th, 2012, 6:22pm

Detect the DC content (a LPF)

use a summation circuit to subtract that value from the
signal.


Essentially a control systems problem.

Title: Re: Passive filter Implementation
Post by Vladislav D on Feb 29th, 2012, 4:15am


loose-electron wrote on Feb 27th, 2012, 2:17pm:
Why not a control feedback system to get rid of the DC?

Jerry, you mean chopping, don't u?

Title: Re: Passive filter Implementation
Post by raja.cedt on Feb 29th, 2012, 4:22am

no..i guess what he mean is Auto zeroing, or ultimately you are using 1-Z^-1.

Thanks,
Raj.

Title: Re: Passive filter Implementation
Post by aaron_do on Feb 29th, 2012, 5:00am

Hi Loose_electron,



Quote:
Detect the DC content (a LPF)

use a summation circuit to subtract that value from the
signal.



does this kind of implementation not still suffer from the same issue of large size? I'm thinking the LPF corner frequency needs to be very low


cheers,
Aaron

Title: Re: Passive filter Implementation
Post by RobG on Feb 29th, 2012, 7:21am


raja.cedt wrote on Feb 29th, 2012, 4:22am:
no..i guess what he mean is Auto zeroing, or ultimately you are using 1-Z^-1.


You can do it continuous time -- we used to call them servo loops -- basically a low pass filter in the feedback in a loop. But then I believe you still have the problem of generating a low freq pole. For 0.05 Hz, using a 10 pF cap you need to synthesize a 318 G-ohm resistor. A simple gm/c filter would use about 1 pA of current so that won't work! I'm not sure if a simple switched cap would work - I thought you needed an opamp to make those work very well.

It seems to me that the area of an opamp is going to be small compared to the capacitances that you need.

Like Raj, I was also thinking some double sampling method that would give you a (1-z^-1) transfer would be the easiest (i.e. sample twice, subtract the result). In practice this could be done by sampling the input and then subtracting the sampled value from the continuous time input before the amplification (which is essentially what Jerry is suggesting but without an explicit feedback circuit).

I've never done this, but one simple thing that comes to mind is to AC couple the signal into the IA. Periodically "zero" the input of the IA by shorting the IA inputs to a reference. This will sample the input voltage on the AC coupling caps. Then, when you open the shorting switches, the IA will be amplifying the difference, giving you the (1-z^-1) characteristic. The roll-off will be determined by the sampling rate, not the cap. However, the caps will need to be big so that leakage doesn't drain them since your sample time will be longer than 20 seconds.

Seems tough. If common mode leakage currents don't kill you, mismatches in leakage currents probably will. It is better to do it in the digital domain if you can (and also remove the low freq effects of the IA)...

Let us know what works for you.
rg

Title: Re: Passive filter Implementation
Post by gido on Feb 29th, 2012, 7:28am

ok. Thanks all. The timeline is close enough . I think i have to employ the Gm-C with special techniques to realise the low Gm needed.....
Any suggestion?

Title: Re: Passive filter Implementation
Post by Vladislav D on Feb 29th, 2012, 8:46am


gido wrote on Feb 29th, 2012, 7:28am:
ok. Thanks all. The timeline is close enough . I think i have to employ the Gm-C with special techniques to realise the low Gm needed.....
Any suggestion?


High-pass RL filter with active inductor (two gm elements and 1 cap). The values of components should be quite decent. Of course, it depends on the bandwidth you need...  

Title: Re: Passive filter Implementation
Post by Vladislav D on Feb 29th, 2012, 9:09am

not so decent...miscalculated it....

Title: Re: Passive filter Implementation
Post by RobG on Feb 29th, 2012, 9:36am


Vladislav D wrote on Feb 29th, 2012, 9:09am:
not so decent...miscalculated it....


Curious what numbers you came up with... Are active filters regularly built with this low of cut-off?

I'm starting to think a dac in a feedback loop to zero the input periodically... Convert the residue and add it to the feedback dac and you'll have the entire signal digitized (or just look at the residue value if you just want the high frequency portion).

Title: Re: Passive filter Implementation
Post by loose-electron on Feb 29th, 2012, 2:27pm

If you do this as an analog method then
it can require some filtering and big circuits.

There are digital methods that work
nicely at low frequencies.

at the feedback summation point its a
DAC summed with the input signal.

For the LPF system, digital averaging
to determine DC is easily done.

A purely analog approach will not be size efficient.

Interesting thing - if the signals are well defined
then your ADC to detect DC offset can be as simple as a
comparator and some DSP. For a DC balanced signal you
are just trying to maintain 50% duty cycle out of the comparator
to get rid of the offset.

A digital counter-averaging system  is orders of magnitude
smaller than an integration capacitor.

Title: Re: Passive filter Implementation
Post by loose-electron on Feb 29th, 2012, 2:41pm

For everyone suggesting purely analog methods...

Did the world not "go digital" about 40 years back?

LOL!

Just saying!

The method I described above I have used
in a bunch of DC offset
cancellation methods for receiver channels in cell
phones, and in a prior life disk drive read channels.

You need to understand the frequency of offset
update, its magnitude and how it affects the signal.

But if you think that out its a very robust solution.

Title: Re: Passive filter Implementation
Post by Vladislav D on Feb 29th, 2012, 2:46pm


Quote:
Curious what numbers you came up with...

Considering first order LR with tau at L/R and the desired tau 20sec, even with a resistor 10 Ohms, L should be 200H. If a gyrator has inductance L=C/gm^2, and let's suppose minimum gm value is 5uA/V, C should be 5nF...heh


The Designer's Guide Community Forum » Powered by YaBB 2.2.2!
YaBB © 2000-2008. All Rights Reserved.