The Designer's Guide Community Forum https://designers-guide.org/forum/YaBB.pl Design >> Analog Design >> Switched capacitor leakage at low frequencies https://designers-guide.org/forum/YaBB.pl?num=1330527079 Message started by gido on Feb 29th, 2012, 6:51am

Title: Switched capacitor leakage at low frequencies Post by gido on Feb 29th, 2012, 6:51am Hello, please can someone explain to me why there would be charge/ current leakage in switched capacitor circuits at very low frequencies? I read it somewhere but didn't get any explanation. Thanks. Gideon

Title: Re: Switched capacitor leakage at low frequencies Post by RobG on Feb 29th, 2012, 7:32am The leakage will come from the switching transistors - either from the pn junction (e.g. drain to substrate) or from the drain-source "off" current. Ask the modeler how accurately they measured the difference between these two effects since sometimes they just throw in estimates. It doubles every few degrees C, so for 20 second time constants, I hope your environment is not hot... rg

Title: Re: Switched capacitor leakage at low frequencies Post by loose-electron on Feb 29th, 2012, 2:45pm Frequently it is not even in the model Also it will be poorly modeled due to the difficulty of measurement.

Title: Re: Switched capacitor leakage at low frequencies Post by carlgrace on Feb 29th, 2012, 4:18pm gido wrote on Feb 29th, 2012, 6:51am: Hello, please can someone explain to me why there would be charge/ current leakage in switched capacitor circuits at very low frequencies? I read it somewhere but didn't get any explanation. Thanks. Gideon You can also have trouble with the input transistors in the OTA used with the switched capacitor.  This problem gets worse and worse in deep submicron technologies and puts a lower limit on the frequency of operation of many practical circuits, such as Pipelined ADCs.  Also, when you make the caps small to go fast, you make the problem worse.

Title: Re: Switched capacitor leakage at low frequencies Post by Dan Clement on Feb 29th, 2012, 6:06pm I recently tried to do a SC SDM in 0.18um and the thin gate devices were much too leaky. And I was only trying to run at about ten or twenty kHz. My high temp limit was only 85C.  My caps were huge too, multiple pFs. I can't imagine what the poor 32nm guys do...  Maybe the run their sample clock in the high MHz range :).

Title: Re: Switched capacitor leakage at low frequencies Post by loose-electron on Feb 29th, 2012, 7:18pm Dan Clement wrote on Feb 29th, 2012, 6:06pm: I recently tried to do a SC SDM in 0.18um and the thin gate devices were much too leaky. And I was only trying to run at about ten or twenty kHz. My high temp limit was only 85C.  My caps were huge too, multiple pFs. I can't imagine what the poor 32nm guys do...  Maybe the run their sample clock in the high MHz range :). With gate oxides 4 molecules thick, what would you expect?

Title: Re: Switched capacitor leakage at low frequencies Post by Dan Clement on Feb 29th, 2012, 7:18pm :)

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