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Design >> RF Design >> ADPLL spurs
https://designers-guide.org/forum/YaBB.pl?num=1331198839

Message started by rfmems on Mar 8^th, 2012, 1:27am

Title: ADPLL spurs
Post by rfmems on Mar 8^th, 2012, 1:27am

If we assume TDC and DCO completely linear, do we still have spurs unique to ADPLL? (except spurs due to SD modulator pattern, which is common to fractional-N PLL)

Is TDC resolution a problem? cause the PLL couldn't correct phase error less than TDC resolution. But would that turn into spurs or just noise?

Title: Re: ADPLL spurs
Post by raja.cedt on Mar 8^th, 2012, 1:30am

no, but Qunatization noise and MASH can create some spurs at high frequency.

Title: Re: ADPLL spurs
Post by rfmems on Mar 8^th, 2012, 1:35am

Thanks raja.cedt!

I suppose TDC resolution is something unique to ADPLL. If the ADPLL fails to correct phase error less than TDC resolution, the quantization error could show up as spurs, am I right?