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https://designers-guide.org/forum/YaBB.pl Design >> Analog Design >> Criteria for choosing a particular W/L to plot gm/id Vs id/(w/l) graph https://designers-guide.org/forum/YaBB.pl?num=1331922015 Message started by vinaydreddys on Mar 16th, 2012, 11:20am |
Title: Criteria for choosing a particular W/L to plot gm/id Vs id/(w/l) graph Post by vinaydreddys on Mar 16th, 2012, 11:20am Hi all, I am trying to understand the sizing approach used in gm/id methodology. Though I know how to plot gm/id vs id/(w/l) curves for a given transistor, I don't know how to choose a particular W/L for a given process. ex: TSMC v0.35um W/L = 50um/2um TSMC 90nm W/L = 12um/0.5um and so on... ( The above values are just an example). So... How to decide the initial W/L values to plot the gm/id Vs id/(w/l) graph. Thanks, Vinay |
Title: Re: Criteria for choosing a particular W/L to plot gm/id Vs id/(w/l) graph Post by AnalogDE on Mar 16th, 2012, 2:25pm Choose L's that you're most likely to use. I would start with minimum, 2x minimum, 4x minimum L and so on. Choice of W doesn't really matter, since it's all normalized (i.e. Id/W). I would just pick something like W=10um, which should be within the W bounds of the model. |
Title: Re: Criteria for choosing a particular W/L to plot gm/id Vs id/(w/l) graph Post by loose-electron on Mar 16th, 2012, 6:35pm A different approach - Start with 2 devices: 1 - min channel length used for switches. (call this device "D") 1- channel length where matching data shows good matching (call this devices "A) Set the channel W of device "A" to a width that shows good matching. "A" is now set W/L "D" is min channel length, and is set to a "W" equal to that of "A" From here on, your transistor sizing is totally done by: NF = # M = 1, or 2 (for common centroid diff pairs) Why do this? Now all your transistors are the same width and makes the layout much easier to do. |
Title: Re: Criteria for choosing a particular W/L to plot gm/id Vs id/(w/l) graph Post by vinaydreddys on Mar 19th, 2012, 10:34am Thanks for your valuable inputs. When i plot with different L s (Lmin, 2x, 4x.. ), I will get different curves, each varying with respect to the other. So, Which one should I choose, to get W/L s of transistors in the design...? Say for example, in the design of a 2-stage op-amp, the L for the input transistors is different from that of the L for current mirrors. (source : MILLER OTA DESIGN USING A DESIGN METHODOLOGY BASED ON THE GM/ID AND EARLY-VOLTAGE CHARACTERISTICS: DESIGN CONSIDERATIONS AND EXPERIMENTAL RESULTS ) So, should I consider two different gm/id Vs id/(w/l) curves... or should I take the average of the curves obtained for different Ls..? I am confused about the final curve(s), that is taken as reference to proceed with this gm-id approach. Thanks a lot, Vinay. |
Title: Re: Criteria for choosing a particular W/L to plot gm/id Vs id/(w/l) graph Post by loose-electron on Mar 19th, 2012, 10:49am As a general rule you can use a bias curve set to select voltages and then adjust the desired bias current using changes to W (or change the NF or M numbers in the method I have outlined) |
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