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https://designers-guide.org/forum/YaBB.pl Simulators >> Circuit Simulators >> Anyone know about how to observe the eye diagram by Cadence spectre simulation https://designers-guide.org/forum/YaBB.pl?num=1333263923 Message started by henrytqy on Apr 1st, 2012, 12:05am |
Title: Anyone know about how to observe the eye diagram by Cadence spectre simulation Post by henrytqy on Apr 1st, 2012, 12:05am I am now designing a LA(Limiting Amplifier), and I want to see the eye diagram by simulation, but I don't know how? Thanks a lot. |
Title: Re: Anyone know about how to observe the eye diagram by Cadence spectre simulation Post by Geoffrey_Coram on Apr 2nd, 2012, 9:23am Many waveform viewing tools include a feature to take the output of a simple transient and present it as an eye diagram. (They split up the waveform into sections and translate them back to the origin.) Check the documentation for your viewer. |
Title: Re: Anyone know about how to observe the eye diagram by Cadence spectre simulation Post by henrytqy on Apr 2nd, 2012, 8:23pm Geoffrey_Coram wrote on Apr 2nd, 2012, 9:23am:
Thanks, I have found the way. There is a function eyediagram in the calculator of Cadence spectre. May I ask an other Q? Since my input signal is a RBS(random bit stream), I was reqired to set the period, rise-time,fall-time,delay. For example, in the codition T=50ps,Trise=1ps,Tfall=1ps, I wiil see a very large overshoot.Should I owed this to the too-short Trise and Tfall, or my ckt? Thanks |
Title: Re: Anyone know about how to observe the eye diagram by Cadence spectre simulation Post by Geoffrey_Coram on Apr 3rd, 2012, 5:38am You can easily get overshoot from dv/dt feed-through of capacitors -- if your input rises quickly, and there is a capacitance (CGDO, for example) from the input to the output, that capacitance looks like a short for very fast signals / high frequencies. You could perhaps add some series resistance to cut the feed-through. Tfall/trise are too short for your circuit, but you'd have to look at the design specifications to know whether your circuit is poorly designed or whether you have chosen times that are faster than the required specifications. |
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