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https://designers-guide.org/forum/YaBB.pl Design Languages >> Verilog-AMS >> verilogA example code of opamp https://designers-guide.org/forum/YaBB.pl?num=1334700004 Message started by seanpai on Apr 17th, 2012, 3:00pm |
Title: verilogA example code of opamp Post by seanpai on Apr 17th, 2012, 3:00pm Hi guys, I am using a verilog-A to build up an behavior model of opamp for LDO. My opamp is a differntail input folded cascode and single ended output amp, and I am going to limit the output range of it between vdd-2 Vov and 2Vov. I looked at the opamp example in the ahdlLib, which is in the virtuoso library, and can't figure out the code in "soft output limiting" part in the bottom. The code is showed as follows: "if (V(vout) > (V(vspply_p) - vsoft)) I(cout, vref) <+ gm_nom*(V(vout, vspply_p)+vsoft); else if (V(vout) < (V(vspply_n) + vsoft)) I(cout, vref) <+ gm_nom*(V(vout, vspply_n)-vsoft); " In my understanding, the first and second line mean when Vout > Vdd-2 Vov, then I(out) will be gm*(V(vdd,vout)+2Vov) in my case. And the third and fourth line mean when Vout < vss(=0 in my case)+2Vov, then I(out) will be gm*(V(vout,0)+2Vov) in my case. Am I correct? Moreover, I don't know how the "V(vout, vspply_p)+vsoft" and "V(vout, vspply_n)-vsoft" are derived? Finally, why I(out) here become a Vout related value? It should be gm*vin_val by definition, right? Can anyone help me figure out these problems please? Thank you so much. |
Title: Re: verilogA example code of opamp Post by boe on Apr 17th, 2012, 3:11pm seanpai, the model reduces gm if you get closer than vsoft to either rail. - B O E |
Title: Re: verilogA example code of opamp Post by seanpai on Apr 17th, 2012, 3:51pm boe wrote on Apr 17th, 2012, 3:11pm:
Hello B.O.E, Thank you for the reply. But I am still confused in the equation "I(cout,vref) <+ gm_nom*(V(vout,vspply_p+vsoft))". Why gm_nom would time "(V(vout,vspply_p+vsoft))" here? :-X |
Title: Re: verilogA example code of opamp Post by boe on Apr 18th, 2012, 1:50pm seanpai wrote on Apr 17th, 2012, 3:51pm:
Note that V(vout,vspply_p)+vsoft = 0 is equivalent to V(out) = V(supply_p)-vsoft. - B O E |
Title: Re: verilogA example code of opamp Post by seanpai on Apr 18th, 2012, 2:11pm But why I(out) comes from gm_nom * "(V(vout,vspply_p+vsoft))" not gm_nom * "vin_val" here? And if V(vout,vspply_p)+vsoft = 0, we'll get a zero I(out), right? Always appreciate for your response. Thanks. |
Title: Re: verilogA example code of opamp Post by boe on Apr 19th, 2012, 1:44pm Seanpai, Note that all contribution statements to one branch current are added. - B O E |
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