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Message started by purplewolf on Apr 24th, 2012, 5:57am

Title: RF design and dc op analysis issue
Post by purplewolf on Apr 24th, 2012, 5:57am

I have designed some RF blocks  and i analysed them using standard analysis of PAC/PNOISE/PSS . It gave me desired performance. Now i discover when i run dc analysis that some critical devices are in linear or sub-threshhold region. Now since the design is sent to manufacturing. What performance should i except??

Title: Re: RF design and dc op analysis issue
Post by aaron_do on Apr 24th, 2012, 5:25pm

I think you can just check process corners and find out. Vary supply and temperature too. I assume you've properly modeled your system...

Title: Re: RF design and dc op analysis issue
Post by rfcooltools.com on Apr 25th, 2012, 9:28am

purplewolf,

Subthreshold operation is sometimes a more common mode of operation with deep submicron processes.  The primary drawback of this region of operation is vt mismatch.  vt mismatch always occurs in processing, and one way to mitigate these effects is to operate the device in saturation and increase the overdrive voltage such that vt mismatch becomes a smaller factor in current variations.

http://rfcooltools.com

Title: Re: RF design and dc op analysis issue
Post by loose-electron on May 5th, 2012, 10:17am


purplewolf wrote on Apr 24th, 2012, 5:57am:
I have designed some RF blocks  and i analysed them using standard analysis of PAC/PNOISE/PSS . It gave me desired performance. Now i discover when i run dc analysis that some critical devices are in linear or sub-threshhold region. Now since the design is sent to manufacturing. What performance should i except??


Something very basic here.

Before you start doing all the detailed simulation
work that you are describing, you need to get
the DC operating point right.

Is "manufacturing" mean a fabrication of some test devices,
or put into a manufactured product going out for sale?

Either way, you probably have problems.

Title: Re: RF design and dc op analysis issue
Post by purplewolf on May 7th, 2012, 7:19am

For current mirrors its okay as  all devices need to be in saturation..
but for block like gilbert cell mixer which is non-linear and a driven circuit, should dc analysis be performed on all corners and check every device in saturation.?

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