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Design >> Analog Design >> Current-steering DAC ?
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Message started by gsensor on Apr 30^th, 2012, 11:20am

Title: Current-steering DAC ?
Post by gsensor on Apr 30^th, 2012, 11:20am

Hi,

I'm designing my first voltage-mode DAC (8 bit). I'm using 0.13 um CMOS technology.
The output voltage of this DAC will be used to set the input reference voltage of a latched comparator working at 100 MHz.
For precision, the DAC needs to have a maximum settling time of 10 ns and +/- 0.5 LSB for DNL and INL and a sampling frequency of at least 5 MHz. Also, I'm looking for low power (< 100 uW) and less than 300 um x 300 um of space.
Load capacitor and resistance are determined by the input mosfet of the comparator. Simulations results gives CL = Cin_mosfet = 2fF and RL_max=2 *10^13.
It seems that the current-steering topology is the best for this, since its a high-speed application. Although, will I be able to achieve low power with this topology ?
Any modification I could do to a standard current-steering topology to lower the power and settling time ?

Thanks for your advice!

Title: Re: Current-steering DAC ?
Post by gsensor on May 1^st, 2012, 11:36am

Could I achieve a settling time of 10 ns with a Sigma-Delta DAC ?

Title: Re: Current-steering DAC ?
Post by loose-electron on May 5^th, 2012, 10:37am

thats not terribly fast.

How about something really simple like a string of resistors and some switches?

Could you do a sigma-delta? Sure, but need to know what you have available for clocking the system at bcause you need a high enough oversampling rate.

current steering tends to take up a lot of space and consume current.

Title: Re: Current-steering DAC ?
Post by gsensor on May 6^th, 2012, 10:04pm

Ain't a resistor string configuration require too much space, since 64 resistors (2^6) are necessary ?

Title: Re: Current-steering DAC ?
Post by loose-electron on May 7^th, 2012, 9:12pm

a current steering array can take up a lot as well, especially when you realize it needs cascodes, and larger sizes to get reasonable current matches.

John-Martin textbook covers a device where they mux around the bottom bits and drop the resistor count.

Many different options, if area is the issue, do a rough size estimate of the various methods.

Title: Re: Current-steering DAC ?
Post by gsensor on May 8^th, 2012, 8:39am

Actually, both low power (< 100uW) and low area (< 300 um x 300 um) are the issue.
I was thinking of using a simple 6bit binary-weighted current-steering architecture with a low Iref (around 1 uA). Since, this DAC will be use to generate constant DC voltage (varying every 200 ns), I was thinking about using a sample and hold that would save this DC voltage and supply it at the output for the amount of time needed.
So, once I obtain the voltage value from the DAC, it get stored in the sample/hold and the DAC could then be cut-off by applying Din =000000 and total dynamic power could be minimize...?

Title: Re: Current-steering DAC ?
Post by loose-electron on May 9^th, 2012, 8:51pm

6 bits binary weighted?

examine the matching requirements between those current sources to get to 6 bits, you may find the accuracy there is an issue.

Title: Re: Current-steering DAC ?
Post by gsensor on May 14^th, 2012, 7:56am

Thanks for your advice loose-electron.
Indeed, accuracy is not so great with a simple 6-bit binary-weighted current-steering DAC, but it's enough for my application. Using a sample-and-hold circuit I managed to get less than 100 uW of power consumption. Also, I will use an off-chip resistor R to calibrate Voutput (Iout*R) in function of fabrication process variations.